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Alexander G Ghyka
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Golden AI
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Patent primary examiner of
US Patent 11171017 Shutter disk
US Patent 11171286 Method of processing workpiece
US Patent 11177156 Semiconductor package, manufacturing method of semiconductor device and semiconductor package
US Patent 7354777 Discrete nano-textured structures in biomolecular arrays, and method of use
US Patent 7354867 Etch process for improving yield of dielectric contacts on nickel silicides
US Patent 7354873 Method for forming insulation film
US Patent 7358597 UV-activated dielectric layer
US Patent 7361582 Method of forming a damascene structure with integrated planar dielectric layers
US Patent 11183488 Three-dimensional memory devices with stacked device chips using interposers
US Patent 7378355 System and methods for polishing a wafer
US Patent 7381660 Dielectric barrier layer for a copper metallization layer having a varying silicon concentration along its thickness
US Patent 7387903 Method for manufacturing layer pattern, method for manufacturing wiring, and method for manufacturing electronic equipment
US Patent 7390738 Fabrication of semiconductor devices using anti-reflective coatings
US Patent 7390757 Methods for improving low k FSG film gap-fill characteristics
US Patent 7393765 Low temperature CVD process with selected stress of the CVD layer on CMOS devices
US Patent 7393797 Method for thermal processing a semiconductor wafer
US Patent 7396778 Method for synthesizing polymeric material, method for forming polymer thin film and method for forming interlayer insulating film
US Patent 7399359 Method and system for providing a thin film with a controlled crystal orientation using pulsed laser induced melting and nucleation-initiated crystallization
US Patent 7399703 Process for patterning nanocarbon material, semiconductor device, and method for manufacturing semiconductor device
US Patent 7399705 Method for producing a local coating and combinatory substrate having such coating
US Patent 7399715 Organic silica-based film, method of forming the same, composition for forming insulating film for semiconductor device, interconnect structure, and semiconductor device
US Patent 7399716 Precursor for hafnium oxide layer and method for forming hafnium oxide film using the precursor
US Patent 7402512 High aspect ratio contact structure with reduced silicon consumption
US Patent 7402514 Line-to-line reliability enhancement using a dielectric liner for a low dielectric constant interlevel and intralevel (or intermetal and intrametal) dielectric layer
US Patent 7405150 Post passivation interconnection schemes on top of the IC chips
US Patent 7405154 Structure and method of forming electrodeposited contacts
US Patent 7405168 Plural treatment step process for treating dielectric films
US Patent 7407861 Method and system for high-speed, precise micromachining an array of devices
US Patent 7410814 Process and apparatus for cleaning silicon wafers
US Patent 7410882 Method of manufacturing and structure of polycrystalline semiconductor thin-film heterostructures on dissimilar substrates
US Patent 7410916 Method of improving initiation layer for low-k dielectric film by digital liquid flow meter
US Patent 7416978 Film forming method, film forming system and recording medium
US Patent 7416982 Semiconductor devices and methods for manufacturing the same
US Patent 7418921 Plasma CVD apparatus for forming uniform film
US Patent 7419902 Method of manufacture of semiconductor integrated circuit
US Patent 7422700 Compositions and methods of electrochemical removal of material from a barrier layer of a wafer
US Patent 7425501 Semiconductor structure implementing sacrificial material and methods for making and implementing the same
US Patent 7425502 Minimizing resist poisoning in the manufacture of semiconductor devices
US Patent 7432194 Etching method and method for forming contact opening
US Patent 7432197 Methods of patterning photoresist, and methods of forming semiconductor constructions
US Patent 7432210 Process to open carbon based hardmask
US Patent 7435686 Semiconductor processing using energized hydrogen gas and in combination with wet cleaning
US Patent 7442656 Method and apparatus for forming silicon oxide film
US Patent 7445953 Low temperature curable materials for optical applications
US Patent 7446031 Post passivation interconnection schemes on top of IC chips
US Patent 7446035 Post passivation interconnection schemes on top of IC chips
US Patent 7446036 Gap free anchored conductor and dielectric structure and method for fabrication thereof
US Patent 7446061 Method of forming insulating film, method of manufacturing semiconductor device and their controlling computer program
US Patent 7449391 Methods of forming plurality of capacitor devices
US Patent 7452830 Semiconductor devices and methods for manufacturing the same
US Patent 7456100 Top layers of metal for high performance IC's
US Patent 7459318 Ferroelectric and high dielectric constant integrated circuit capacitors with three-dimensional orientation for high-density memories, and method of making the same
US Patent 7459395 Method for purifying a metal carbonyl precursor
US Patent 7462555 Ball grid array substrate having window and method of fabricating same
US Patent 7468326 Method of cleaning a wafer
US Patent 7470557 Self-aligned coating on released MEMS
US Patent 7470590 Methods of forming semiconductor constructions
US Patent 7470633 Method of forming a carbon polymer film using plasma CVD
US Patent 7470634 Method for forming interlayer dielectric film for semiconductor device by using polyhedral molecular silsesquioxane
US Patent 7470637 Film formation apparatus and method of using the same
US Patent 7473592 Method of fabricating a semiconductor device
US Patent 7473621 Producing method for crystalline thin film
US Patent 7473654 Method of forming an oxide film, an oxide film, a component and an electronic apparatus
US Patent 7473971 Method of fabricating a semiconductor device
US Patent 7476576 Method of fabricating a semiconductor device
US Patent 7476599 Two-phase thermal method for preparation of cadmium sulfide quantum dots
US Patent 7476615 Deposition process for iodine-doped ruthenium barrier layers
US Patent 7479435 Method of forming a circuit having subsurface conductors
US Patent 7479450 Post passivation interconnection schemes on top of the IC chips
US Patent 7479460 Silicon surface preparation
US Patent 7481850 Solid electrolytic capacitor, stacked capacitor using the same, and fabrication method thereof
US Patent 7482178 Chamber stability monitoring using an integrated metrology tool
US Patent 7482272 Through chip connection
US Patent 7482281 Substrate processing method
US Patent 7482282 Use of dilute hydrochloric acid in advanced interconnect contact clean in nickel semiconductor technologies
US Patent 7482676 Compositions for preparing low dielectric materials
US Patent 7485524 MOSFETs comprising source/drain regions with slanted upper surfaces, and method for fabricating the same
US Patent 7488652 Manufacturing method of gate oxidation films
US Patent 7488655 Method for fabricating semiconductor device
US Patent 7488659 Structure and methods for stress concentrating spacer
US Patent 7488672 Well photoresist pattern of semiconductor device and method for forming the same
US Patent 7488694 Methods of forming silicon nitride layers using nitrogenous compositions
US Patent 7488937 Method and apparatus for the improvement of material/voltage contrast
US Patent 7491577 Method and apparatus for providing thermal management on high-power integrated circuit devices
US Patent 7491603 Transistors of semiconductor device having channel region in a channel-portion hole and methods of forming the same
US Patent 7491621 Method of forming isolation structures in a semiconductor manufacturing process
US Patent 7491624 Method of manufacturing low CTE substrates for use with low-k flip-chip package devices
US Patent 7491643 Method and structure for reducing contact resistance between silicide contact and overlying metallization
US Patent 7491662 Substrate processing apparatus
US Patent 7494884 SiGe selective growth without a hard mask
US Patent 7494911 Buffer layers for device isolation of devices grown on silicon
US Patent 7498195 Multi-chip semiconductor connector assembly method
US Patent 7498199 Method for fabricating semiconductor package
US Patent 7498205 Method for manufacturing substrate with cavity
US Patent 7498232 Semiconductor devices and methods of manufacture thereof
US Patent 7498257 Methods for metal ARC layer formation
US Patent 7498268 Gas delivery system for semiconductor processing
US Patent 7498272 Method of depositing rare earth oxide thin films
US Patent 7501315 Methods and devices for forming nanostructure monolayers and devices including such monolayers
US Patent 7504268 Adaptive shape substrate support method
US Patent 7504276 Micro device having micro system structure and method for method for manufacturing the same
US Patent 7504283 Stacked-flip-assembled semiconductor chips embedded in thin hybrid substrate
US Patent 7504288 Method for laser-processing semiconductor device
US Patent 7504299 Folded node trench capacitor
US Patent 7504344 Method of forming a carbon polymer film using plasma CVD
US Patent 7507622 Semiconductor device and manufacturing method thereof
US Patent 7507666 Manufacture method for semiconductor device having concave portions filled with conductor containing Cu as its main composition
US Patent 7507677 Removable amorphous carbon CMP stop
US Patent 7507678 Method and apparatus for forming oxynitride film and nitride film, oxynitride film, nitride film, and substrate
US Patent 7510960 Bridge for semiconductor internal node
US Patent 7510967 Method for manufacturing semiconductor device
US Patent 7510982 Creation of porosity in low-k films by photo-disassociation of imbedded nanoparticles
US Patent 7511379 Surface mountable direct chip attach device and method including integral integrated circuit
US Patent 7514288 Manufacturing methods for thin film fuse phase change ram
US Patent 7514316 Semiconductor device and method of manufacturing the same
US Patent 7514347 Interconnect structure and fabricating method thereof
US Patent 7514359 Adhering layers to metals with dielectric adhesive layers
US Patent 7514372 Epitaxial growth of relaxed silicon germanium layers
US Patent 11189487 Method and apparatus for high pressure cure of flowable dielectric films
US Patent 11189586 Semiconductor device and fabrication method of the semiconductor device
US Patent 7517727 Method for connection of an integrated circuit to a substrate, and a corresponding circuit arrangement
US Patent 7517754 Methods of forming semiconductor constructions
US Patent 7517798 Methods for forming through-wafer interconnects and structures resulting therefrom
US Patent 7517814 Method and system for forming an oxynitride layer by performing oxidation and nitridation concurrently
US Patent 7517815 Spin-on glass composition, method of preparing the spin-on glass composition and method of forming a porous silicon oxide layer using the spin-on glass composition
US Patent 7521275 Free-standing electrostatically-doped carbon nanotube device and method for making same
US Patent 7521289 Package having dummy package substrate and method of fabricating the same
US Patent 7521311 Semiconductor device and method for fabricating the same
US Patent 7521341 Method of direct deposition of polycrystalline silicon
US Patent 7521804 Semiconductor device preventing electrical short and method of manufacturing the same
US Patent 7524692 Method of producing nitride layer and method of fabricating vertical structure nitride semiconductor light emitting device
US Patent 7524746 High-refractive index materials comprising semiconductor nanocrystal compositions, methods of making same, and applications therefor
US Patent 7524755 Entire encapsulation of Cu interconnects using self-aligned CuSiN film
US Patent 7524759 Post passivation interconnection schemes on top of IC chip
US Patent 7524765 Direct tailoring of the composition and density of ALD films
US Patent 7527999 Cd
US Patent 7528008 Method of electrically connecting a microelectronic component
US Patent 7528053 Three-dimensional package and method of making the same
US Patent 7528061 Systems and methods for solder bonding
US Patent 7531388 Electrically programmable fuse structures with narrowed width regions configured to enhance current crowding and methods of fabricating thereof
US Patent 7531403 SOI semiconductor components and methods for their fabrication
US Patent 7531414 Method of manufacturing integrated circuit device including recessed channel transistor
US Patent 7531448 Manufacturing method of dual damascene structure
US Patent 7531464 Semiconductive device fabricated using a substantially disassociated chlorohydrocarbon
US Patent 7531466 Metal organic deposition precursor solution synthesis and terbium-doped SiO
US Patent 7531467 Manufacturing method of semiconductor device and substrate processing apparatus
US Patent 7531468 System and method for forming a gate dielectric
US Patent 7531890 Multi-chip package (MCP) with a conductive bar and method for manufacturing the same
US Patent 7531894 Method of electrically connecting a microelectronic component
US Patent 7534642 Methods of manufacturing an image device
US Patent 7534650 Carbon-carbon and/or metal-carbon fiber composite heat spreader
US Patent 7534666 High voltage non punch through IGBT for switch mode power supplies
US Patent 7534717 Method of manufacturing semiconductor device
US Patent 7534718 Post passivation interconnection schemes on top of IC chips
US Patent 7534723 Methods of forming fine patterns, and methods of forming trench isolation layers using the same
US Patent 7534732 Semiconductor devices with copper interconnects and composite silicon nitride capping layers
US Patent 7535029 Material system for tailorable white light emission and method for making thereof
US Patent 7537943 Method of manufacturing a semiconductor integrated circuit device
US Patent 7537960 Method of making multi-chip package with high-speed serial communications between semiconductor dice
US Patent 7537969 Fuse structure having reduced heat dissipation towards the substrate
US Patent 7537980 Method of manufacturing a stacked semiconductor device
US Patent 7538022 Method of manufacturing electronic circuit device
US Patent 7538023 Method of manufacturing a semiconductor wafer device having separated conductive patterns in peripheral area
US Patent 7538026 Multilayer low reflectivity hard mask and process therefor
US Patent 7538042 Method of manufacturing a structure having a projection
US Patent 7541267 Reversed T-shaped finfet
US Patent 7541280 Method of foming a micromechanical structure
US Patent 7544529 Image sensor packaging structure and method of manufacturing the same
US Patent 7544552 Method for manufacturing junction semiconductor device
US Patent 7544573 Semiconductor device including MOS field effect transistor having offset spacers or gate sidewall films on either side of gate electrode and method of manufacturing the same
US Patent 7544588 Laser processing method for wafer
US Patent 7547568 Electrical conditioning of MEMS device and insulating layer thereof
US Patent 7550367 Method for separating semiconductor substrate
US Patent 7550371 Method of producing SIMOX wafer
US Patent 7550390 Method and apparatus for dielectric etching during integrated circuit fabrication
US Patent 7553736 Increasing dielectric constant in local regions for the formation of capacitors
US Patent 7553759 Semiconductor device and method of manufacturing a semiconductor device
US Patent 7553776 Patterned functionalized silicon surfaces
US Patent 7554167 Three-dimensional analog input control device
US Patent 7554211 Semiconductor wafer and manufacturing process for semiconductor device
US Patent 7556972 Detection and characterization of SiCOH-based dielectric materials during device fabrication
US Patent 7556975 Method for manufacturing backside-illuminated optical sensor
US Patent 7556978 Piezoelectric MEMS switches and methods of making
US Patent 7557014 Semiconductor system-in-package
US Patent 7557021 Highly doped gate electrode made by rapidly melting and resolidifying the gate electrode
US Patent 7557904 Wafer holding mechanism
US Patent 7560303 Method and apparatus for linear die transfer
US Patent 7560310 Semiconductor constructions and semiconductor device fabrication methods
US Patent 7560362 Cutting method for substrate
US Patent 7562686 Method and system for 3D alignment in wafer scale integration
US Patent 7563628 Fabrication of optical waveguide devices
US Patent 7563648 Semiconductor device package and method for manufacturing same
US Patent 7563691 Method for plasma enhanced bonding and bonded structures formed by plasma enhanced bonding
US Patent 7563693 Method for manufacturing semiconductor substrate and semiconductor substrate
US Patent 7563695 Method and system for high-speed precise laser trimming and scan lens for use therein
US Patent 7563703 Microelectronic interconnect device comprising localised conductive pins
US Patent 7563714 Low resistance and inductance backside through vias and methods of fabricating same
US Patent 7563725 Method of depositing materials on a non-planar surface
US Patent 7564136 Integration scheme for Cu/low-k interconnects
US Patent 7566630 Buried silicon dioxide / silicon nitride bi-layer insulators and methods of fabricating the same
US Patent 7566638 Method of dicing a semiconductor device into plural chips
US Patent 7566650 Integrated circuit solder bumping system
US Patent 7566668 Method of forming contact
US Patent 7569435 Transistor manufacture
US Patent 7569469 Dielectric nanostructure and method for its manufacture
US Patent 7569487 Method for atomic layer deposition of materials using a pre-treatment for semiconductor devices
US Patent 7569489 High performance 3D FET structures, and methods for forming the same using preferential crystallographic etching
US Patent 7572665 Microelectronics grade metal substrate, related metal-embedded devices and methods for fabricating same
US Patent 7572731 Unsymmetrical ligand sources, reduced symmetry metal-containing compounds, and systems and methods including same
US Patent 7575992 Method of forming micro patterns in semiconductor devices
US Patent 7576001 Manufacturing method for semiconductor device
US Patent 7579262 Different embedded strain layers in PMOS and NMOS transistors and a method of forming the same
US Patent 7582507 Catalyst support substrate, method for growing carbon nanotubes using the same, and the transistor using carbon nanotubes
US Patent 7582531 Method for producing a buried semiconductor layer
US Patent 7582557 Process for low resistance metal cap
US Patent 7582950 Semiconductor chip having gettering layer, and method for manufacturing the same
US Patent 7585749 Methods of forming a layer of material on a substrate and structures formed therefrom
US Patent 7585757 Semiconductor device and method of manufacturing the same
US Patent 7585771 Method of manufacturing semiconductor device
US Patent 7585783 Drop discharge apparatus, method for forming pattern and method for manufacturing semiconductor device
US Patent 7588995 Method to create damage-free porous low-k dielectric films and structures resulting therefrom
US Patent 7588998 Method for producing a semiconductor element
US Patent 7589003 GeSn alloys and ordered phases with direct tunable bandgaps grown directly on silicon
US Patent 7589015 Fabrication of semiconductor devices using anti-reflective coatings
US Patent 7589031 Method of avoiding haze formation on surfaces of silicon-containing PECVD-deposited thin films
US Patent 7592208 Method for manufacturing semiconductor substrate and method for manufacturing semiconductor apparatus and photomask
US Patent 7592236 Method for applying a structure of joining material to the back surfaces of semiconductor chips
US Patent 7592242 Apparatus and method for controlling diffusion
US Patent 7592274 Method for fabricating semiconductor element
US Patent 7592689 Semiconductor module comprising semiconductor chips and method for producing the same
US Patent 7594644 Semiconductor device and method for manufacturing the same, circuit board, electronic apparatus, and semiconductor device manufacturing apparatus
US Patent 7598167 Method of forming vias in semiconductor substrates without damaging active regions thereof and resulting structures
US Patent 7598178 Carbon precursors for use during silicon epitaxial film formation
US Patent 7598181 Process for enhancing solubility and reaction rates in supercritical fluids
US Patent 7598595 Fabrication of nanoporous antireflection film
US Patent 7601558 Transparent zinc oxide electrode having a graded oxygen content
US Patent 7601612 Method for forming solder joints for a flip chip assembly
US Patent 7601618 Method for producing semi-conditioning material wafers by moulding and directional crystallization
US Patent 7601622 Method of forming fine patterns in semiconductor device and method of forming gate using the same
US Patent 7601648 Method for fabricating an integrated gate dielectric layer for field effect transistors
US Patent 7601651 Method to improve the step coverage and pattern loading for dielectric films
US Patent 7608527 Laser irradiation method and method for manufacturing crystalline semiconductor film
US Patent 7611914 Method of fabricating turning mirror using sacrificial spacer layer and device made therefrom
US Patent 7611942 Semiconductor integrated circuit device and a method of manufacturing the same
US Patent 7611954 Bipolar transistor self-alignment with raised extrinsic base extension and methods of forming same
US Patent 7611968 Wafer laser processing method and laser beam processing machine
US Patent 7611972 Semiconductor devices and methods of manufacture thereof
US Patent 7611979 Metal gates with low charge trapping and enhanced dielectric reliability characteristics for high-k gate dielectric stacks
US Patent 7611980 Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures
US Patent 7615408 Method of manufacturing semiconductor device
US Patent 7615414 Dental intraoral radiological image sensor with a fiber-optic plate
US Patent 7618867 Method of forming a doped portion of a semiconductor and method of forming a transistor
US Patent 7618903 Soft mold, method of manufacturing the same, and patterning method using the same
US Patent 7621970 Manufacturing method of electrolytic capacitor
US Patent 7622376 Method for manufacturing semiconductor device using polymer
US Patent 7622378 Multi-step system and method for curing a dielectric film
US Patent 7622383 Methods of forming conductive polysilicon thin films via atomic layer deposition and methods of manufacturing semiconductor devices including such polysilicon thin films
US Patent 7625785 Semiconductor device and manufacturing method thereof
US Patent 7625808 Method for manufacturing bonded wafer
US Patent 7625814 Filling deep features with conductors in semiconductor manufacturing
US Patent 7625819 Interconnection process
US Patent 7625820 Method of selective coverage of high aspect ratio structures with a conformal film
US Patent 7629212 Doped WGe to form dual metal gates
US Patent 7629248 Multi-layered metal line of semiconductor device for preventing diffusion between metal lines and method for forming the same
US Patent 7629272 Ultraviolet assisted porogen removal and/or curing processes for forming porous low k dielectrics
US Patent 7632701 Thin film solar cells by selenization sulfurization using diethyl selenium as a selenium precursor
US Patent 7632742 Substrate for growing Pendeo epitaxy and method of forming the same
US Patent 7632756 Semiconductor processing using energized hydrogen gas and in combination with wet cleaning
US Patent 7635608 Method of fabricating organic electronic device
US Patent 7635632 Gate electrode for a semiconductor fin device
US Patent 7638352 Method of manufacturing photoelectric conversion device
US Patent 7638404 Method for forming low temperature polysilicon thin film transistor with low doped drain structure
US Patent 7638408 Manufacturing method of substrate provided with semiconductor films
US Patent 7642180 Semiconductor on insulator vertical transistor fabrication and doping process
US Patent 7642598 Method of fabricating a semiconductor device
US Patent 7645628 Method and system for fabricating semiconductor components with lens structures and lens support structures
US Patent 7645642 Method of joining a thermoplastic material to a thermoset material, and thermoplastic-thermoset composite
US Patent 7645651 LDMOS with channel stress
US Patent 7645686 Method of bonding chips on a strained substrate and method of placing under strain a semiconductor reading circuit
US Patent 7645698 Method for forming barrier layer
US Patent 7645712 Method of forming contact
US Patent 7645713 Substrate processing system and substrate processing method
US Patent 7648854 Methods of forming metal oxide layers, methods of forming gate structures using the same, and methods of forming capacitors using the same
US Patent 7648856 Methods for attaching microfeature dies to external devices
US Patent 7648901 Manufacturing process and apparatus therefor utilizing reducing gas
US Patent 7649256 Semiconductor chip having pollished and ground bottom surface portions
US Patent 7651872 Discrete nano-textured structures in biomolecular arrays, and method of use
US Patent 7651939 Method of blocking a void during contact formation
US Patent 7655544 Self-assembled nanostructures
US Patent 7655569 Method of manufacturing semiconductor device
US Patent 7655578 Method for nanostructuring of the surface of a substrate
US Patent 7658773 Method for fabricating a solid electrolyte memory device and solid electrolyte memory device
US Patent 7659132 Semiconductor element holding apparatus and semiconductor device manufactured using the same
US Patent 7659191 Gold/silicon eutectic die bonding method
US Patent 7659204 Oxidized barrier layer
US Patent 7662654 Vacuum packaged single crystal silicon device
US Patent 7662655 Vacuum packaged single crystal silicon device
US Patent 7662662 Method for manufacturing carrier substrate
US Patent 7662696 Method for fabricating semiconductor devices
US Patent 7662716 Method for forming silicide contacts
US Patent 7662727 Method for manufacturing semiconductor device background
US Patent 7666698 Method for forming and sealing a cavity for an integrated MEMS device
US Patent 7666759 Method and system for high-speed, precise micromachining an array of devices
US Patent 7670882 Electronic device fabrication
US Patent 7670923 Method of fabricating strain-silicon CMOS
US Patent 7670928 Ultra-thin oxide bonding for S1 to S1 dual orientation bonding
US Patent 7670962 Substrate having stiffener fabrication method
US Patent 7678651 Method for fabricating semiconductor device
US Patent 7678711 Semiconductor device, and method and apparatus for manufacturing the same
US Patent 7678712 Vapor phase treatment of dielectric materials
US Patent 7682848 Light emitting device with blue light LED and phosphor components
US Patent 7682856 Electro-optical device, method of manufacturing electro-optical device, and electronic apparatus
US Patent 7682933 Wafer alignment and bonding
US Patent 7682955 Method for forming deep well of power device
US Patent 7687293 Method for enhancing growth of semipolar (Al,In,Ga,B)N via metalorganic chemical vapor deposition
US Patent 7687296 Semiconductor device fabrication method
US Patent 7687314 Electronic apparatus manufacturing method
US Patent 7687351 Semiconductor device and method of manufacturing the same
US Patent 7687366 Pre-patterned thin film capacitor and method for embedding same in a package substrate
US Patent 7691658 Method for improved growth of semipolar (Al,In,Ga,B)N
US Patent 7691665 Process for making an organic field effect transistor
US Patent 7691720 Vertical nanotube semiconductor device structures and methods of forming the same
US Patent 7691731 Deposition of crystalline layers on polymer substrates using nanoparticles and laser nanoforming
US Patent 7695988 Quantum dot conjugates in a sub-micrometer fluidic channel
US Patent 7695999 Production method of semiconductor device
US Patent 7696043 Method of manufacturing a flash memory device
US Patent 7696085 Dual damascene metal interconnect structure having a self-aligned via
US Patent 7696533 Indium nitride layer production
US Patent 7699899 Method for insulative film for capacitor components
US Patent 7700390 Method for fabricating three-dimensional photonic crystal
US Patent 7700400 Back junction solar cell and process for producing the same
US Patent 7700403 Manufacturing method of semiconductor device
US Patent 7700431 Method for manufacturing a semiconductor device having polysilicon plugs
US Patent 7700471 Methods of making semiconductor-based electronic devices on a wire and articles that can be made thereby
US Patent 7700472 Method of forming a gate of a semiconductor device
US Patent 7700474 Barrier deposition using ionized physical vapor deposition (iPVD)
US Patent 7704814 Method for manufacturing MOS transistor of semiconductor device
US Patent 7704823 Strained semiconductor device and method of making same
US Patent 7704838 Method for forming an independent bottom gate connection for buried interconnection including bottom gate of a planar double gate MOSFET
US Patent 7704857 Method of manufacturing semiconductor device
US Patent 7704896 Atomic layer deposition of thin films on germanium
US Patent 7708787 Electrode for electric chemical capacitor, manufacturing method and apparatus thereof
US Patent 7709342 Capacitor and method of manufacturing the same
US Patent 7709379 Electrical device comprising conductors made of carbonized plastic, and method and apparatus for the production thereof
US Patent 7709400 Thermal methods for cleaning post-CMP wafers
US Patent 7713833 Method for manufacturing semiconductor device
US Patent 7713841 Methods for thinning semiconductor substrates that employ support structures formed on the substrates
US Patent 7713852 Methods for forming field effect transistors and EPI-substrate
US Patent 7713864 Method of cleaning semiconductor substrate conductive layer surface
US Patent 7718449 Wafer level package for very small footprint and low profile white LED devices
US Patent 7718465 Semiconductor device and process for producing same
US Patent 7718494 Method for forming high-drain-voltage tolerance MOSFET transistor in a CMOS process flow with double well dose approach
US Patent 7718507 Bonded wafer and method of producing the same
US Patent 7718512 Integrated circuit wafer with inter-die metal interconnect lines traversing scribe-line boundaries
US Patent 7718536 Planarization process for pre-damascene structure including metal hard mask
US Patent 7718544 Method of forming silicon-containing insulation film having low dielectric constant and low diffusion coefficient
US Patent 7718545 Fabrication process
US Patent 7723133 Method for forming pattern, and method for manufacturing liquid crystal display
US Patent 7723135 Manufacturing method of display device
US Patent 7723141 Encapsulation in a hermetic cavity of a microelectronic composite, particularly of a MEMS
US Patent 7723152 Patterning method, method of manufacturing organic field effect transistor, and method of manufacturing flexible printed circuit board
US Patent 7723209 Semiconductor device and manufacturing method thereof, delamination method, and transferring method
US Patent 7723212 Method for forming median crack in substrate and apparatus for forming median crack in substrate
US Patent 7723227 Methods of forming copper-comprising conductive lines in the fabrication of integrated circuitry
US Patent 7723230 Method for manufacturing semiconductor device and method for designing photomask pattern
US Patent 7723237 Method for selective removal of damaged multi-stack bilayer films
US Patent 7723241 Plasma processing method and computer storage medium
US Patent 7727904 Methods of forming SiC MOSFETs with high inversion layer mobility
US Patent 7732228 Method for manufacturing printing head
US Patent 7732262 Semiconductor device and method of manufacturing the same
US Patent 7732291 Semiconductor device having stressed etch stop layers of different intrinsic stress in combination with PN junctions of different design in different device regions
US Patent 7732296 Method of fabricating metal-insulator-metal capacitor and metal-insulator-metal capacitor manufactured by the method
US Patent 7732299 Process for wafer bonding
US Patent 7732301 Bonded intermediate substrate and method of making same
US Patent 7732311 Methods of manufacturing semiconductor devices
US Patent 7732349 Manufacturing method of insulating film and semiconductor device
US Patent 7736919 Method of producing a light-emitting diode comprising a nanostructured PN junction and diode thus obtained
US Patent 7736931 Wafer process flow for a high performance MEMS accelerometer
US Patent 7736980 Vertical gated access transistor
US Patent 7736995 Process for producing components
US Patent 7736999 Manufacturing method of semiconductor device
US Patent 7737023 Method of manufacture of semiconductor integrated circuit device and semiconductor integrated circuit device
US Patent 7741136 Method of fabricating turning mirror using sacrificial spacer layer and device made therefrom
US Patent 7741153 Modular chip integration techniques
US Patent 7741195 Method of stimulating die circuitry and structure therefor
US Patent 7741204 Mixed-scale electronic interfaces
US Patent 7745238 Monitoring of temperature variation across wafers during processing
US Patent 7745239 Arrangement of fill unit elements in an integrated circuit interconnect layer
US Patent 7745281 Thin solid electrolytic capacitor embeddable in a substrate
US Patent 7745309 Methods for surface activation by plasma immersion ion implantation process utilized in silicon-on-insulator structure
US Patent 7745313 Substrate release methods and apparatuses
US Patent 7745330 Method of carbon nanotube modification
US Patent 7745331 Method for fabricating contact plug in semiconductor device
US Patent 7745894 Semiconductor memory device
US Patent 7749794 Method of preparing electrode
US Patent 7749820 Thin film transistor, manufacturing method thereof, display device, and manufacturing method thereof
US Patent 7749852 Methods of forming metal-insulator-metal (MIM) capacitors with passivation layers on dielectric layers
US Patent 7749882 Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
US Patent 7754510 Phase-separated dielectric structure fabrication process
US Patent 7754551 Method for making very low
US Patent 7754593 Semiconductor device and manufacturing method therefor
US Patent 7759137 Flip chip interconnection structure with bump on partial pad and method thereof
US Patent 7759152 MEMS thermal actuator and method of manufacture
US Patent 7759229 Charge-free method of forming nanostructures on a substrate
US Patent 7759241 Group II element alloys for protecting metal interconnects
US Patent 7763317 High K dielectric growth on metal triflate or trifluoroacetate terminated III-V semiconductor surfaces
US Patent 7763551 RLSA CVD deposition control using halogen gas for hydrogen scavenging
US Patent 7767481 Image sensor and method for manufacturing the same
US Patent 7767511 Semiconductor device manufactured using a method to improve gate doping while maintaining good gate profile
US Patent 7767580 Semiconductor device and method of fabricating the same
US Patent 7772024 Method of manufacturing a micro-mechanical element
US Patent 7772035 Manufacturing method of semiconductor device
US Patent 7772071 Strained channel transistor and method of fabrication thereof
US Patent 7772112 Method of manufacturing a semiconductor device
US Patent 7772128 Semiconductor system with surface modification
US Patent 7776730 Siloxane polymer composition, method of forming a pattern using the same, and method of manufacturing a semiconductor using the same
US Patent 7776733 Method for depositing titanium nitride films for semiconductor manufacturing
US Patent 7776734 Barrier layer for fine-pitch mask-based substrate bumping
US Patent 7776758 Methods and devices for forming nanostructure monolayers and devices including such monolayers
US Patent 7776764 Single walled carbon nanotubes coated with dielectric substance and TFT using thereof
US Patent 7781277 Selective uniaxial stress relaxation by layout optimization in strained silicon on insulator integrated circuit
US Patent 7781286 Method for fabricating non-volatile storage with individually controllable shield plates between storage elements
US Patent 7785928 Integrated circuit device and method of manufacturing thereof
US Patent 7785962 Methods of forming a plurality of capacitors
US Patent 7785998 Methods of forming dispersions of nanoparticles, and methods of forming flash memory cells
US Patent 7786017 Utilizing inverse reactive ion etching lag in double patterning contact formation
US Patent 7790483 Thin film transistor and manufacturing method thereof, and display device and manufacturing method thereof
US Patent 7790533 Laser irradiation method, laser irradiation apparatus, and method for manufacturing semiconductor device
US Patent 7790534 Method to form low-defect polycrystalline semiconductor material for use in a transistor
US Patent 7790601 Forming interconnects with air gaps
US Patent 7790635 Method to increase the compressive stress of PECVD dielectric films
US Patent 7795067 Semitransparent flexible thin film solar cells and modules
US Patent 7795081 Method for manufacturing thin film transistor
US Patent 7795097 Semiconductor device manufactured by removing sidewalls during replacement gate integration scheme
US Patent 7795120 Doping wide band gap semiconductors
US Patent 7795160 ALD of metal silicate films
US Patent 7799099 Method of manufacturing a current collector for a double electric layer capacitor
US Patent 7799640 Method of forming a semiconductor device having trench charge compensation regions
US Patent 7799644 Transistor with asymmetry for data storage circuitry
US Patent 7799700 Method for applying resin film to face of semiconductor wafer
US Patent 7800200 Wireless IC tag and method for manufacturing same
US Patent 7803651 Method of manufacturing solar cell module and method of manufacturing solar cell
US Patent 7803670 Twisted dual-substrate orientation (DSO) substrates
US Patent 7804125 System and method for reducing process-induced charging
US Patent 7811836 Methods of manufacturing reference sample substrates for analyzing metal contamination levels
US Patent 7811904 Method of fabricating a semiconductor device employing electroless plating
US Patent 7811909 Production of a hexagonal boron nitride crystal body capable of emitting out ultraviolet radiation
US Patent 7815693 Piezoelectric ultracapacitor
US Patent 7815786 Copper electrodeposition in microelectronics
US Patent 7816678 Organic light emitting display with single crystalline silicon TFT and method of fabricating the same
US Patent 7816787 Method of forming low stress multi-layer metallurgical structures and high reliable lead free solder termination electrodes
US Patent 7817175 Laser induced thermal imaging apparatus and fabricating method of organic light emitting diode using the same
US Patent 7824452 Powder modification in the manufacture of solid state capacitor anodes
US Patent 7829353 Pulsed mass flow delivery system and method
US Patent 7829359 Method for fabricating highly reflective ohmic contact in light-emitting devices
US Patent 7829381 Method of manufacturing a semiconductor device
US Patent 7829447 Semiconductor structure pattern formation
US Patent 7833851 Semiconductor device and manufacturing method thereof
US Patent 7833906 Titanium silicon nitride deposition
US Patent 7838390 Methods of forming integrated circuit devices having ion-cured electrically insulating layers therein
US Patent 7838394 Method of manufacturing semiconductor device
US Patent 7838398 Epitaxially coated semiconductor wafer and device and method for producing an epitaxially coated semiconductor wafer
US Patent 7838443 Method for minimizing the corner effect by densifying the insulating layer
US Patent 7838949 Porous gas sensors and method of preparation thereof
US Patent 7842104 Method of manufacturing solid electrolytic capacitor
US Patent 7842547 Laser lift-off of sapphire from a nitride flip-chip
US Patent 7842588 Group-III metal nitride and preparation thereof
US Patent 7842603 Method for fabricating semiconductor memory device
US Patent 7846217 Method for a partially etched capacitor layer including a connection member
US Patent 7846218 Method of manufacturing electrolytic capacitor
US Patent 7847406 Solder alloy material layer composition, electroconductive and adhesive composition, flux material layer composition, solder ball transferring sheet, bump and bump forming process, and semiconductore device
US Patent 7851240 Method of forming diffraction grating and method of fabricating distributed feedback laser diode
US Patent 7851337 Method for producing semiconductor substrate
US Patent 7851343 Methods of forming ohmic layers through ablation capping layers
US Patent 7851362 Method for reducing an unevenness of a surface and method for making a semiconductor device
US Patent 7851369 Hardmask trim method
US Patent 7851781 Buffer layers for device isolation of devices grown on silicon
US Patent 7854772 Solid electrolytic capacitor and manufacturing method therefor
US Patent 7855123 Method of integrating an air gap structure with a substrate
US Patent 7855130 Corrosion inhibitor additives to prevent semiconductor device bond-pad corrosion during wafer dicing operations
US Patent 7855140 Method of forming vias in semiconductor substrates and resulting structures
US Patent 7858426 Method of texturing solar cell and method of manufacturing solar cell
US Patent 7858450 Optic mask and manufacturing method of thin film transistor array panel using the same
US Patent 7858467 Method of manufacturing semiconductor device
US Patent 7858479 Method and apparatus of fabricating semiconductor device
US Patent 7858523 Unsymmetrical ligand sources, reduced symmetry metal-containing compounds, and systems and methods including same
US Patent 7858537 Plasma processing method and apparatus
US Patent 7863156 Method of producing a strained layer
US Patent 7863164 Method of growing GaN using CVD and HVPE
US Patent 7863190 Method of selective coverage of high aspect ratio structures with a conformal film
US Patent 7867291 Laser-welded solid electrolytic capacitor
US Patent 7867803 Method of fabricating light emitting device and compound semiconductor wafer and light emitting device
US Patent 7867858 Hybrid transistor based power gating switch circuit and method
US Patent 7867861 Semiconductor device employing precipitates for increased channel stress
US Patent 7867905 System and method for semiconductor processing
US Patent 7867914 System and method for forming an integrated barrier layer
US Patent 7867915 Method for activating nitride surfaces for amine-reactive chemistry
US Patent 7868386 Method and apparatus for semiconductor device with improved source/drain junctions
US Patent 7871903 Method and system for high-speed, precise micromachining an array of devices
US Patent 7871937 Process and apparatus for treating wafers
US Patent 7875087 Capacitors including interacting separators and surfactants
US Patent 7875483 Manufacturing method of microelectromechanical system
US Patent 7875527 Manufacturing method for semiconductor device and semiconductor device
US Patent 7875548 Method for making semiconductor structures implementing sacrificial material
US Patent RE42097 Method of fabricating a semiconductor device
US Patent 7879693 Thermal treatment equipment and method for heat-treating
US Patent 7879704 Memory function body, particle forming method therefor and, memory device, semiconductor device, and electronic equipment having the memory function body
US Patent 7879714 Semiconductor device manufacturing method
US Patent 7880859 Substrate processing system and substrate processing method
US Patent 7883943 Method for manufacturing thin film transistor and method for manufacturing display device
US Patent 7883984 Method of manufacturing flash memory device
US Patent 7884017 Thermal methods for cleaning post-CMP wafers
US Patent 7884034 Method of manufacturing semiconductor device and substrate processing apparatus
US Patent RE42139 Method of fabricating a semiconductor device
US Patent 7888142 Copper contamination detection method and system for monitoring copper contamination
US Patent 7888236 Semiconductor device and fabrication methods thereof
US Patent 7888239 Semiconductor device manufacturing method
US Patent 7888695 Light emitting device and manufacture method thereof
US Patent 7892923 Power field effect transistor and manufacturing method thereof
US Patent 7892965 Post passivation interconnection schemes on top of IC chip
US Patent 7897515 Method of fabricating structures
US Patent 7897518 Plasma processing method and computer storage medium
US Patent 7901956 Structure for bumped wafer test
US Patent 7901959 Liquid crystal display and back light having a light emitting diode
US Patent 7901993 Method of making a semiconductor chip assembly with an aluminum post/base heat spreader and a silver/copper conductive trace
US Patent 7901994 Methods of manufacturing group III nitride semiconductor devices with silicon nitride layers
US Patent 7902022 Self-aligned in-laid split gate memory and method of making
US Patent 7902067 Post passivation interconnection schemes on top of the IC chips
US Patent 7906368 Phase change memory with tapered heater
US Patent 7906433 Semiconductor device having wirings formed by damascene and its manufacture method
US Patent RE42241 Method of fabricating a semiconductor device
US Patent 7910456 Liquid based substrate method and structure for layer transfer applications
US Patent 7910493 Semiconductor device manufacturing method, semiconductor device, plasma nitriding treatment method, control program and computer storage medium
US Patent 7910911 Phase change memory with tapered heater
US Patent 7910917 Structure and method for realizing a microelectronic device provided with a number of quantum wires capable of forming one or more transistor channels
US Patent 7915075 Method for manufacturing semiconductor device
US Patent 7915104 Methods and compositions for preparing tensile strained Ge on Ge
US Patent 7915157 Chip structure and process for forming the same
US Patent 7915161 Post passivation interconnection schemes on top of IC chip
US Patent 7915166 Diffusion barrier and etch stop films
US Patent 7915175 Etching nitride and anti-reflective coating
US Patent 7919830 Method and structure for ballast resistor
US Patent 7923352 Thermal treatment equipment and method for heat-treating
US Patent 7923366 Post passivation interconnection schemes on top of IC chip
US Patent 7923380 Substrate processing apparatus and substrate processing method
US Patent 7923386 Method to improve the step coverage and pattern loading for dielectric films
US Patent 7923838 Method and structure for reducing contact resistance between silicide contact and overlying metallization
US Patent 7927904 Method of making BIOMEMS devices
US Patent 7927981 Apparatus for depositing silicon-based thin film and method for depositing silicon-based thin film
US Patent 7927982 Apparatus for mass-producing silicon-based thin film and method for mass-producing silicon-based thin film
US Patent 7927985 Method of manufacturing semiconductor devices
US Patent 7927992 Carbon nanotubes for the selective transfer of heat from electronics
US Patent 7927993 Cross-contamination control for semiconductor process flows having metal comprising gate electrodes
US Patent 7928536 Roughness reducing film at interface, materials for forming roughness reducing film at interface, wiring layer and semiconductor device using the same, and method for manufacturing semiconductor device
US Patent 7932124 Methods of preparing photovoltaic modules
US Patent 7932151 Semiconductor device and method of manufacturing the same
US Patent 7932163 Methods of forming stacked semiconductor devices with single-crystal semiconductor regions
US Patent 7935548 Deposition apparatus and deposition method
US Patent 7935643 Stress management for tensile films
US Patent 7938866 Solid electrolytic capacitor containing a conductive polymer
US Patent 7939347 Semiconductor device manufacturing method
US Patent 7939375 Method of making a semiconductor chip assembly with a post/base heat spreader and a cavity in the post
US Patent 7943416 Local heterostructure contacts
US Patent 7943433 Method of manufacturing semiconductor device
US Patent 7943487 Method for manufacturing semiconductor device
US Patent 7944013 Optoelectronic module, and method for the production thereof
US Patent 7947543 Recessed gate silicon-on-insulator floating body device with self-aligned lateral isolation
US Patent 7947568 Method of manufacturing semiconductor device
US Patent 7947580 Hybrid semiconductor structure
US Patent 7947611 Method of improving initiation layer for low-k dielectric film by digital liquid flow meter
US Patent RE42409 Method of manufacturing flash memory device
US Patent 7951637 Back contact solar cells using printed dielectric barrier
US Patent 7951659 Method for simultaneously tensile and compressive straining the channels of NMOS and PMOS transistors respectively
US Patent 7951683 In-situ process layer using silicon-rich-oxide for etch selectivity in high AR gapfill
US Patent 7951724 Wafer fixture for wet process applications
US Patent 7952140 Methods of fabricating semiconductor devices having multiple channel transistors and semiconductor devices fabricated thereby
US Patent 7955876 Method for simulating deposition film shape and method for manufacturing electronic device
US Patent 7955893 Wafer level chip scale package and process of manufacture
US Patent 7955898 Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
US Patent 7960190 Temporary package for at-speed functional test of semiconductor chip
US Patent 7960194 Method for manufacturing a reflective surface sub-assembly for a light-emitting device
US Patent 7960289 Etching method, pattern forming process, thin-film transistor fabrication process, and etching solution
US Patent 7964464 Semiconductor device and method of manufacturing the same
US Patent 7964475 Semiconductor wafer, method of manufacturing the same and semiconductor device
US Patent 7964500 Method of manufacturing semiconductor integrated circuit device
US Patent 7964503 Methods of patterning photoresist, and methods of forming semiconductor constructions
US Patent 7964511 Plasma ashing method
US Patent 7968420 Manufacturing semiconductor device and method of manufacturing electronic apparatus
US Patent 7972888 Methods for manufacturing MEMS sensor and thin film and cantilever beam thereof with epitaxial growth process
US Patent 7972972 Molecular self-assembly in substrate processing
US Patent 7972975 Method for forming a dielectric film and novel precursors for implementing said method
US Patent 7973302 Forming phase change memory cells
US Patent 7977129 Method for manufacturing semiconductor optical device
US Patent 7977130 Method of assembling displays on substrates
US Patent 7977146 Method for manufacturing a photovoltaic module
US Patent 7977148 Method for manufacturing image sensor
US Patent 7977192 Fabrication method of trenched metal-oxide-semiconductor device
US Patent 7977215 Method of processing optical device wafer
US Patent 7981740 Enhanced cap layer integrity in a high-K metal gate stack by using a hard mask for offset spacer patterning
US Patent 7981756 Common plate capacitor array connections, and processes of making same
US Patent 7981778 Directional solid phase crystallization of thin amorphous silicon for solar cell applications
US Patent 7985608 Methods of manufacturing active matrix substrate and organic light emitting display device
US Patent 7985617 Methods utilizing microwave radiation during formation of semiconductor constructions
US Patent 7989225 Method for detaching layers with low magnetic permeability
US Patent 7989238 Group III nitride-based compound semiconductor light-emitting device and production method therefor
US Patent 7989240 Methods of manufacturing active matrix substrate and organic light-emitting display device
US Patent 7989244 Method of manufacturing nitride-based semiconductor light-emitting device
US Patent 7989275 Thin film transistor, manufacturing method thereof, display device, and manufacturing method thereof
US Patent 7989298 Transistor having V-shaped embedded stressor
US Patent 7989300 Method of manufacturing semiconductor device
US Patent 7993418 Solid electrolytic capacitor and method of manufacturing the same
US Patent 7993953 Method of manufacturing photoelectric conversion device
US Patent 7994007 Semiconductor device and method for manufacturing
US Patent 7994020 Method of forming finned semiconductor devices with trench isolation
US Patent 7994031 Method of manufacturing CMOS devices by the implantation of N- and P-type cluster ions
US Patent 7994501 Method and apparatus for electronically aligning capacitively coupled mini-bars
US Patent 7998837 Method for fabricating semiconductor device using spacer patterning technique
US Patent 7998847 III-nitride crystal manufacturing method, III-nitride crystal substrate, and III-nitride semiconductor device
US Patent 7999355 Aminosilanes for shallow trench isolation films
US Patent 8003433 Process for fabricating a high-integration-density image sensor
US Patent 8003472 Method of manufacturing semiconductor device
US Patent 8003487 Methods of manufacturing a semiconductor device using a layer suspended across a trench
US Patent 8003544 Method of manufacturing semiconductor device
US Patent 8003550 Method for revealing emergent dislocations in a germanium-base crystalline element
US Patent 8008139 Method of manufacturing thin film transistor array substrate
US Patent 8008163 Method of fabricating semiconductor device
US Patent 8008182 Semiconductor device and method for manufacturing semiconductor device
US Patent 8012814 Method of forming a high performance fet and a high voltage fet on a SOI substrate
US Patent 8012816 Double pass formation of a deep quantum well in enhancement mode III-V devices
US Patent 8012837 Method of manufacturing semiconductor device
Edits on 13 Dec, 2021
Golden AI
edited on 13 Dec, 2021
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Patent primary examiner of
US Patent 8012837 Method of manufacturing semiconductor device
Golden AI
edited on 13 Dec, 2021
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Patent primary examiner of
US Patent 8012816 Double pass formation of a deep quantum well in enhancement mode III-V devices
Golden AI
edited on 13 Dec, 2021
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+1
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Infobox
Patent primary examiner of
US Patent 8012814 Method of forming a high performance fet and a high voltage fet on a SOI substrate
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
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Patent primary examiner of
US Patent 8008182 Semiconductor device and method for manufacturing semiconductor device
Golden AI
edited on 8 Dec, 2021
Edits made to:
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Patent primary examiner of
US Patent 8008163 Method of fabricating semiconductor device
Golden AI
edited on 8 Dec, 2021
Edits made to:
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Patent primary examiner of
US Patent 8008139 Method of manufacturing thin film transistor array substrate
Golden AI
edited on 8 Dec, 2021
Edits made to:
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Patent primary examiner of
US Patent 8003550 Method for revealing emergent dislocations in a germanium-base crystalline element
Golden AI
edited on 8 Dec, 2021
Edits made to:
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Infobox
Patent primary examiner of
US Patent 8003544 Method of manufacturing semiconductor device
Golden AI
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Patent primary examiner of
US Patent 8003487 Methods of manufacturing a semiconductor device using a layer suspended across a trench
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