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US Patent 7498199 Method for fabricating semiconductor package

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Is a
Patent
Patent
1

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
1
Patent Number
74981991
Patent Inventor Names
Seung Taek Yang1
Date of Patent
March 3, 2009
1
Patent Application Number
117773681
Date Filed
July 13, 2007
1
Patent Primary Examiner
‌
Alexander G Ghyka
1
Patent abstract

A method for fabricating a semiconductor package includes the steps of: forming a material layer containing conductive particles on a semiconductor chip having a plurality of bonding pads on the upper surface thereof, baking the material layers to a non-flowing state; attaching the semiconductor chip in a face down manner to a substrate having connecting pads on the location corresponding to the bonding pads by using the material layers containing conductive particles; applying voltage for a electrical signal exchange to the semiconductor chip and the substrate so that the conductive particles are gathered between the bonding pads of the semiconductor chip and the connecting pads of the substrate; and curing the conductive particles of the material layers so that the conductive particles gathered between the bonding pads of the semiconductor chip and the connecting pads of the substrate to an non-flowing state.

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