Patent attributes
A carrier substrate and a method for manufacturing the carrier substrate are disclosed herein. The method includes the steps of: providing a core substrate; forming a build-up material layer on the core substrate; forming a via in the build-up material layer; forming a patterned photoresist layer on the build-up material layer covering a portion of the via and exposing an opening from uncovered portion of the via, and a wiring slot connected to the opening; and forming a metal-electroplated layer on the via and the wiring slot. In forming a trace according to the present invention, the metal-electroplated layer is formed as the trace and directly connected to the via, striding or not striding over the via. Additionally, in the carrier substrate structure, there is no need an annular ring to connect the trace to the via, and thus the wiring space is increased.
