Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Shom Ponoth0
Pak Leung0
Samuel S. S. Choi0
Satyanarayana Venkata Nitta0
Daniel C. Edelstein0
Lawrence A. Clevenger0
Maxime Darnon0
Date of Patent
September 7, 2010
0Patent Application Number
125616510
Date Filed
September 17, 2009
0Patent Citations Received
Patent Primary Examiner
Patent abstract
Disclosed is a process of an integration method to form an air gap in an interconnect. On top of a metal wiring layer on a semiconductor substrate is deposited a dielectric cap layer followed by a sacrificial dielectric layer and pattern transfer layers. A pattern is transferred through the pattern transfer layers, sacrificial dielectric layer, dielectric cap layer and into the metal wiring layer. The presence of the sacrificial dielectric layer aids in controlling the thickness and profile of the dielectric cap layer which in turn affects reliability of the interconnect.
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