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Michael T. Tran

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Edits on 14 Dec, 2021
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Golden AI
edited on 14 Dec, 2021
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Patent primary examiner of
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US Patent 7099207 Semiconductor memory device and method for masking predetermined area of memory cell array during write operation
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US Patent 7106635 Bitline booster circuit and method
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US Patent 7113446 Latch circuit and synchronous memory including the same
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US Patent 11176977 Apparatuses and methods for controlling word line discharge
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US Patent 7180820 Integrated semiconductor memory comprising at least one word line and comprising a multiplicity of memory cells
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US Patent 7257041 Memory circuit and related method for integrating pre-decoding and selective pre-charging
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US Patent 7266005 Efficient content addressable memory array for classless inter-domain routing
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US Patent 7266018 Reducing sneak currents in virtual ground memory arrays
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US Patent 7269041 Multi-port memory device
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US Patent 7269050 Method of programming a memory device
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US Patent 7269059 Magnetic recording element and device
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US Patent 7277311 Flash cell fuse circuit
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US Patent 7280379 CAM device and method for repairing the same
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US Patent 7280418 Internal voltage generation control circuit and internal voltage generation circuit using the same
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US Patent 7280430 Semiconductor memory device
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US Patent 7283393 NAND flash memory device and method of fabricating the same
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US Patent 7286418 Internal voltage supply circuit
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US Patent 7286439 Apparatus and method for hierarchical decoding of dense memory arrays using multiple levels of multiple-headed decoders
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US Patent 7289356 Fast magnetic memory devices utilizing spin transfer and magnetic elements used therein
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US Patent 7292495 Integrated circuit having a memory with low voltage read/write operation
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US Patent 7295471 Memory device having a virtual ground array and methods using program algorithm to improve read margin loss
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US Patent 7295488 Apparatus and methods for generating a column select line signal in semiconductor memory device
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US Patent 7295489 Method and circuit for writing double data rate (DDR) sampled data in a memory device
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US Patent 7307863 Programmable strength output buffer for RDIMM address register
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US Patent 7307868 Integrated circuit including memory cell for storing an information item and method
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US Patent 7307901 Apparatus and method for improving dynamic refresh in a memory device
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US Patent 7310273 Method for controlling precharge timing of memory device and apparatus thereof
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US Patent 7310274 Semiconductor device
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US Patent 7310284 Page access circuit of semiconductor memory device
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US Patent 7315468 Thin film magnetic memory device for conducting data write operation by application of a magnetic field
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US Patent 7317648 Memory logic for controlling refresh operations
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US Patent 7319625 Built-in memory current test circuit
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US Patent 7321525 Semiconductor integrated circuit device
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US Patent 7324362 Content addressable memory cell configurable between multiple modes and method therefor
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US Patent 7324372 Storage device
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US Patent 7324375 Multi-bits storage memory
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US Patent 7327604 Clock synchronized non-volatile memory device
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US Patent 7330377 Semiconductor memory device
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US Patent 7333356 One-time programmable memory devices
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US Patent 7339823 Nonvolatile semiconductor storage apparatus and method of driving the same
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US Patent 7339829 Ultra low power non-volatile memory module
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US Patent 7339833 Non-volatile semiconductor memory device
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US Patent 7342839 Memory cell access circuit
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US Patent 7349272 Multi-port semiconductor memory device
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US Patent 7352605 Nonvolatile ferroelectric memory device and method thereof
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US Patent 7352623 NOR flash memory device with multi level cell and read method thereof
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US Patent 7352630 Non-volatile memory device having improved program speed and associated programming method
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US Patent 7355873 Highly integrated ternary semiconductor memory device
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US Patent 7355894 Programming flash memories
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US Patent 7359232 Multi-context memory cell
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US Patent 7359236 Read, write and erase circuit for programmable memory devices
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US Patent 7359248 Methods for programming and reading NAND flash memory device and page buffer performing the same
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US Patent 7359272 Circuit and method for an SRAM with reduced power consumption
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US Patent 7362614 Non-volatile semiconductor storage apparatus
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US Patent 7362639 Semiconductor memory device and refresh control method
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US Patent 7362647 Power control circuit
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US Patent 7366017 Method for modifying data more than once in a multi-level cell memory location within a memory array
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US Patent 7372724 Method for accessing data on magnetic memory
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US Patent 7372726 Semiconductor memory
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US Patent 7372752 Test mode controller
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US Patent 7372758 Semiconductor memory device, method for controlling the same, and mobile electronic device
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US Patent 7372762 Semiconductor memory device
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US Patent 7376014 Highly reliable NAND flash memory using five side enclosed floating gate storage elements
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US Patent 7376029 Semiconductor memory devices including precharge circuit and methods for precharging
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US Patent 7379319 Semiconductor integrated circuit device
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US Patent 7379350 Semiconductor memory device operating using read only memory data
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US Patent 7379371 Method for controlling precharge timing of memory device and apparatus thereof
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US Patent 7379374 Virtual ground circuit for reducing SRAM standby power
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US Patent 7382677 Memory device having internal voltage supply providing improved power efficiency during active mode of memory operation
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US Patent 7382680 Semiconductor integrated circuit device including storage unit having nonvolatile and volatile memory element sections
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US Patent 7385857 Non-volatile, static random access memory with regulated erase saturation and program window
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US Patent 7391641 Multi-layered magnetic memory structures
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US Patent 7391672 Sequential memory and accessing method thereof
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US Patent 7394696 NAND type non-volatile memory device and method of forming the same
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US Patent 7394717 Semiconductor memory device, operational processing device and storage system
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US Patent 7397696 Current sensing architecture for high bitline voltage, rail to rail output swing and Vcc noise cancellation
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US Patent 7400521 Integrated circuit, memory chip and method of evaluating a memory state of a resistive memory cell
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US Patent 7400525 Memory cell with independent-gate controlled access devices and memory using the cell
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US Patent 7400536 Memory system and a voltage regulator
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US Patent 7403429 Method of erasing data with improving reliability in a nonvolatile semiconductor memory device
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US Patent 7403444 Selectable memory word line deactivation
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US Patent 7405962 Magnetic random access memory
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US Patent 7405988 Method and apparatus for systematic and random variation and mismatch compensation for multilevel flash memory operation
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US Patent 7408812 Low-voltage single-layer polysilicon EEPROM memory cell
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US Patent 7411815 Memory write circuit
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US Patent 7411819 Semiconductor integrated circuit device
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US Patent 7411830 Nonvolatile memory cell having current compensated for temperature dependency and data read method thereof
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US Patent 7414887 Variable current sinking for coarse/fine programming of non-volatile memory
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US Patent 7417885 Data carrier system and data saving/restoring method thereof
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US Patent 7417892 Electric device with readable storage data
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US Patent 7417894 Single latch data circuit in a multiple level cell non-volatile memory device
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US Patent 7417895 Nor flash memory and erase method thereof
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US Patent 7417906 Apparatus and related method for controlling switch module in memory by detecting operation voltage of memory
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US Patent 7426127 Full-rail, dual-supply global bitline accelerator CAM circuit
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US Patent 7433217 Content addressable memory cell configurable between multiple modes and method therefor
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US Patent 7433259 Semiconductor memory device having layered bit line structure
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US Patent 7436695 Resistive memory including bipolar transistor access devices
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US Patent 7436699 Nonvolatile semiconductor memory device
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US Patent 7436708 NAND memory device column charging
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US Patent 7436717 Semiconductor device having mechanism capable of high-speed operation
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US Patent 7440341 Semiconductor memory device having trimmed voltage generator and method of generating trimmed voltage in semiconductor memory device
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US Patent 7443747 Memory array bit line coupling capacitor cancellation
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US Patent 7443753 Memory structure, programming method and reading method therefor, and memory control circuit thereof
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US Patent 7443755 Fuse box of semiconductor device
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US Patent 7443760 Multi-port memory device with serial input/output interface
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US Patent 7447061 Magnetoresistive memory array circuit
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US Patent 7447074 Read-only memory
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US Patent 7450415 Phase-change memory device
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US Patent 7450426 Systems utilizing variable program voltage increment values in non-volatile memory program operations
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US Patent 7450455 Semiconductor memory device and driving method thereof
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US Patent 7450463 Address buffer and method for buffering address in semiconductor memory apparatus
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US Patent 7450464 Circuit and method for detecting synchronous mode in a semiconductor memory apparatus
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US Patent 7457153 Integrated circuit memory devices having magnetic memory cells therein that utilize dual-ferromagnetic data layers
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US Patent 7457170 Memory device that provides test results to multiple output pads
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US Patent 7460421 Semiconductor integrated circuit device
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US Patent 7463520 Memory device with variable trim settings
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US Patent 7466581 SRAM design with separated VSS
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US Patent 7466589 NAND memory cell at initializing state and initializing process for NAND memory cell
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US Patent 7466590 Self-boosting method for flash memory cells
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US Patent 7466610 Non-volatile semiconductor memory device
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US Patent 7466614 Sense amplifier for non-volatile memory
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US Patent 7466617 Multi-port dynamic memory structures
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US Patent 7471566 Self-boosting system for flash memory cells
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US Patent 7471572 System and method for enhancing erase performance in a CMOS compatible EEPROM device
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US Patent 7471579 Semiconductor memory and test method for the same
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US Patent 7471588 Dual port random-access-memory circuitry
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US Patent 7471589 Semiconductor memory devices, block select decoding circuits and method thereof
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US Patent 7474560 Non-volatile memory with both single and multiple level cells
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US Patent 7474561 Variable program voltage increment values in non-volatile memory program operations
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US Patent 7474568 Non-volatile memory with programming through band-to-band tunneling and impact ionization gate current
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US Patent 7477536 Ferroelectric random access memory device and method of driving the same
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US Patent 7477543 Flash memory device with program current compensation
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US Patent 7477547 Flash memory refresh techniques triggered by controlled scrub data reads
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US Patent 7477556 256 Meg dynamic random access memory
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US Patent 7477557 256 Meg dynamic random access memory
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US Patent 7480171 MRAM based on vertical current writing and its control method
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US Patent 7480197 Implementing calibration of DQS sampling during synchronous DRAM reads
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US Patent 7483294 Read, write, and erase circuit for programmable memory devices
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US Patent 7483317 Laminated memory having autonomically and sequentially activating operation
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US Patent 7486535 Method and device for programming anti-fuses
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US Patent 7486553 Nonvolatile storage device and method of manufacturing the same, and storage device and method of manufacturing the same
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US Patent 7486561 Method for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages
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US Patent 7489549 System for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages
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US Patent 7489564 256 Meg dynamic random access memory
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US Patent 7492644 Semiconductor integrated circuit device
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US Patent 7492651 Semiconductor memory apparatus
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US Patent 7495945 Non-volatile memory cell for storage of a data item in an integrated circuit
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US Patent 7495947 Reverse bias trim operations in non-volatile memory
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US Patent 7499305 Semiconductor device and driving method of the same
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US Patent 7499308 Programmable heavy-ion sensing device for accelerated DRAM soft error detection
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US Patent 7499355 High bandwidth one time field-programmable memory
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US Patent 7505309 Static RAM memory cell with DNR chalcogenide devices and method of forming
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US Patent 7512022 Non-volatile memory structure
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US Patent 7512032 Electronic device comprising non volatile memory cells with optimized programming and corresponding programming method
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US Patent 7515456 Memory circuit, a dynamic random access memory, a system comprising a memory and a floating point unit and a method for storing digital data
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US Patent 7515467 Method of programming a semiconductor nonvolatile memory cell and memory with multiple charge traps
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US Patent 7515485 External clock tracking pipelined latch scheme
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US Patent 7518932 Erase cycle counting in non-volatile memories
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US Patent 7518937 Parallel bit test circuit and method
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US Patent 7518943 Embedded memory and methods thereof
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US Patent 7522450 Magnetic storage cell, magnetic memory device and magnetic memory device manufacturing method
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US Patent 7529117 Design solutions for integrated circuits with triple gate oxides
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US Patent 7529125 Semiconductor device and operating method thereof
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US Patent 7532499 Semiconductor integrated circuit device
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US Patent 7532503 Magnetic recording element, magnetic recording apparatus and recording method of information
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US Patent 7532535 Apparatus and method for supplying power voltages in active and stand-by modes
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US Patent 7535764 Adjusting resistance of non-volatile memory using dummy memory cells
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US Patent 7535781 Semiconductor memory
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US Patent 7539035 Memory system capable of changing configuration of memory modules
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US Patent 7539050 Resistive memory including refresh operation
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US Patent 7539058 Non-volatile memory and operating method thereof
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US Patent 7539062 Interleaved memory program and verify method, device and system
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US Patent 7542339 Clock synchronized non-volatile memory device
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US Patent 7542369 Integrated circuit having a memory with low voltage read/write operation
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US Patent 7551472 Ferroelectric semiconductor memory device
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US Patent 7551491 Unit cell of a non-volatile memory device, a non-volatile memory device and method thereof
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US Patent 7554831 Integrated circuit device with a ROM matrix
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US Patent 7554879 Apparatus for testing a nonvolatile memory and a method thereof
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US Patent 7558126 Nonvolatile semiconductor memory device
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US Patent 7558132 Implementing calibration of DQS sampling during synchronous DRAM reads
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US Patent 7561458 Ferroelectric memory array for implementing a zero cancellation scheme to reduce plateline voltage in ferroelectric memory
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US Patent 7561474 Program verifying method and programming method of flash memory device
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US Patent 7564717 Semiconductor memory device
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US Patent 7567462 Method and system for selectively limiting peak power consumption during programming or erase of non-volatile memory devices
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US Patent 7570523 Method for using two data busses for memory array block selection
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US Patent 7573739 Multi-bit electromechanical memory devices and methods of manufacturing the same
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US Patent 7573763 Redundancy circuit
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US Patent 7577031 Non-volatile memory with compensation for variations along a word line
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US Patent 7577038 Data input/output multiplexer of semiconductor device
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US Patent 7577047 Semiconductor memory device
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US Patent 7577050 Semiconductor memory device for measuring internal voltage
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US Patent RE40894 Sample and load scheme for observability internal nodes in a PLD
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US Patent 7586780 Semiconductor memory device
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US Patent 7586782 Semiconductor memory
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US Patent 7586793 Dynamic column block selection
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US Patent 7586801 Multi-port semiconductor memory device
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US Patent 7589991 Semiconductor memory device
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US Patent 7589999 Method and apparatus for programming non-volatile data storage device
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US Patent 7590005 Program and erase methods with substrate transient hot carrier injections in a non-volatile memory
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US Patent 7593255 Integrated circuit for programming a memory element
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US Patent 7593256 Memory array with readout isolation
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US Patent 7593258 Protection of the flow of a program executed by an integrated circuit or of data contained in this circuit
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US Patent 7593259 Flash multi-level threshold distribution scheme
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US Patent 7593279 Concurrent status register read
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US Patent 7596046 Data conversion circuit, and semiconductor memory apparatus using the same
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US Patent 7596050 Method for using a hierarchical bit line bias bus for block selectable memory array
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US Patent 7596053 Integrated memory controller
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US Patent 7599229 Methods and structures for expanding a memory operation window and reducing a second bit effect
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US Patent 7599246 Delay locked loop implementation in a synchronous dynamic random access memory
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US Patent 7599247 Memory and method of writing data
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US Patent 7602642 Nonvolatile memory system and associated programming methods
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US Patent 7606074 Word line compensation in non-volatile memory erase operations
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US Patent 7606093 Optimized charge sharing for data bus skew applications
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US Patent 7609570 Switched capacitor charge sharing technique for integrated circuit devices enabling signal generation of disparate selected signal values
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US Patent 7613038 Semiconductor integrated circuit device
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US Patent 7616469 Super leakage current cut-off device for ternary content addressable memory
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US Patent 7616486 Cell array of semiconductor memory device and method of driving the same
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US Patent 7616492 Evaluation circuit and evaluation method for the assessment of memory cell states
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US Patent 7619918 Apparatus, method, and system for flash memory
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US Patent 7619932 Algorithm for charge loss reduction and Vt distribution improvement
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US Patent 7623375 Method of operating a flash memory device
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US Patent 7623379 Semiconductor integrated circuit device and non-volatile memory system using the same
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US Patent 7623395 Buffer circuit and buffer control method
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US Patent 7626869 Multi-phase wordline erasing for flash memory
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US Patent 7630228 Methods and apparatuses for operating memory
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US Patent 7630237 System and method for programming cells in non-volatile integrated memory devices
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US Patent 7630239 Semiconductor device
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US Patent 7630241 Single latch data circuit in a multiple level call non-volatile memory device
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US Patent 7630257 Methods and systems for accessing memory
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US Patent 7630274 Circuit and method for selecting word line of semiconductor memory apparatus
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US Patent 7633802 Non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages
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US Patent 7633809 Semiconductor device
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US Patent 7633817 Semiconductor memory device, controller, and read/write control method thereof
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US Patent 7633820 Current limit circuit and semiconductor memory device
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US Patent 7633827 Semiconductor memory device, operational processing device and storage system
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US Patent 7633828 Hierarchical bit line bias bus for block selectable memory array
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US Patent 7633829 Hierarchical decoding of dense memory arrays using multiple levels of multiple-headed decoders
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US Patent 7636261 Semiconductor memory device capable of high-speed cache read operation
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US Patent 7636267 Semiconductor memory device
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US Patent 7639531 Dynamic cell bit resolution
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US Patent 7639535 Detection and correction of defects in semiconductor memories
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US Patent 7639545 Memory word line driver featuring reduced power consumption
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US Patent 7643337 Multi-bit flash memory and reading method thereof
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US Patent 7643345 Semiconductor memory device which includes stacked gate having charge accumulation layer and control gate
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US Patent 7643355 Semiconductor memory device and method of inputting/outputting data
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US Patent 7643361 Redundancy circuit capable of reducing time for redundancy discrimination
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US Patent 7643362 Semiconductor memory device in which redundancy (RD) of adjacent column is automatically repaired
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US Patent 7646649 Memory device with programmable receivers to improve performance
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US Patent 7649761 Semiconductor memory device
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US Patent 7649788 Buffering systems for accessing multiple layers of memory in integrated circuits
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US Patent 7649791 Non volatile memory device architecture and corresponding programming method
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US Patent 7649798 Memory device using antifuses
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US Patent 7652933 Voltage generating circuit of semiconductor memory apparatus capable of reducing power consumption
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US Patent 7656718 Semiconductor device having output buffer initialization circuit and output buffer initialization method
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US Patent 7656731 Semi-shared sense amplifier and global read line architecture
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US Patent 7656741 Row active time control circuit and a semiconductor memory device having the same
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US Patent 7660147 Programming method for phase change memory
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US Patent 7663904 Operating method of one-time programmable read only memory
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US Patent 7668002 Resistance memory element and nonvolatile semiconductor memory
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US Patent 7668027 Semiconductor device, testing and manufacturing methods thereof
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US Patent 7672180 Semiconductor memory device capable of confirming a failed address and a method therefor
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US Patent 7672182 Read assist circuit of SRAM with low standby current
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US Patent 7672186 Antifuse replacement determination circuit and method of semiconductor memory device
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US Patent 7675773 Semiconductor memory, test method of semiconductor memory and system
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US Patent 7675789 Programmable heavy-ion sensing device for accelerated DRAM soft error detection
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US Patent 7675805 Table lookup voltage compensation for memory cells
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US Patent 7679968 Enhanced erasing operation for non-volatile memory
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US Patent 7684233 Multi-bit magnetic memory device using spin-polarized current and methods of manufacturing and operating the same
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US Patent 7684275 Semiconductor memory devices having memory cell arrays with shortened bitlines
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US Patent 7688641 Method of depressing read disturbance in flash memory device
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US Patent 7692960 Scheme of semiconductor memory and method for operating same
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US Patent 7692990 Memory cell access circuit
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US Patent 7693002 Dynamic word line drivers and decoders for memory arrays
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US Patent 7697336 Non-volatile memory device and method of operating the same
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US Patent 7697344 Memory device and method of operating and fabricating the same
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US Patent 7697357 Negative voltage driving for the digit line isolation gates
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US Patent 7697367 Semiconductor memory device with reduced current consumption
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US Patent 7697369 System with controller and memory
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US Patent 7701747 Non-volatile memory including sub cell array and method of writing data thereto
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US Patent 7701752 Multi-port dynamic memory methods
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US Patent 7701785 Memory with high speed sensing
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US Patent 7706206 Semiconductor integrated circuit
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US Patent RE41325 Dual port random-access-memory circuitry
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US Patent 7719876 Preservation circuit and methods to maintain values representing data in one or more layers of memory
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US Patent 7719921 Duty detection circuit, DLL circuit using the same, semiconductor memory circuit, and data processing system
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US Patent 7724589 System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
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US Patent 7729165 Self-adaptive and self-calibrated multiple-level non-volatile memories
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US Patent 7729183 Data sensing method for dynamic random access memory
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US Patent 7729186 Method and system for testing an integrated circuit
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US Patent 7733686 Pulse width control for read and write assist for SRAM circuits
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US Patent 7733691 Memory device including thermal conductor located between programmable volumes
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US Patent 7733717 Memory system having distributed read access delays
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US Patent 7733727 Receiver circuit of semiconductor memory apparatus
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US Patent 7738275 Leakage current cut-off device for ternary content addressable memory
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US Patent 7738284 Memory cell with independent-gate controlled access devices and memory using the cell
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US Patent 7746692 Multiple-level memory with analog read
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US Patent 7746701 Semiconductor memory device having bit line pre-charge unit separated from data register
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US Patent 7746710 Data bus power-reduced semiconductor storage apparatus
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US Patent 7751233 Method for efficiently driving a phase change memory device
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US Patent 7751251 Current sensing scheme for non-volatile memory
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US Patent 7755936 Integrated circuits, cell, cell arrangement, method of reading a cell, memory module
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US Patent 7755956 Non-volatile semiconductor memory and method for replacing defective blocks thereof
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US Patent 7760537 Programmable ROM
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US Patent 7760552 Verification method for nonvolatile semiconductor memory device
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US Patent 7760556 Data path circuit in a flash memory device
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US Patent 7760564 Non-volatile memory structure
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US Patent 7760568 Memory sensing and latching circuit
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US Patent 7764566 Driver, and a semiconductor memory device having the same
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US Patent 7768823 Phase change memory device and operating method thereof
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US Patent 7768841 Dynamic column block selection
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US Patent 7768863 Package-based voltage control
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US Patent 7773407 8T low leakage SRAM cell
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US Patent 7773414 Self-boosting system for flash memory cells
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US Patent 7773418 Non-volatile memory with both single and multiple level cells
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US Patent 7778082 Non-volatile memory device and programming method
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US Patent 7778104 Semiconductor memory apparatus
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US Patent 7782664 Method for electrically trimming an NVM reference cell
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US Patent 7782668 Integrated circuit embedded with non-volatile one-time-programmable and multiple-time programmable memory
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US Patent 7782671 Semiconductor device and method of manufacturing the same
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US Patent 7782677 NAND memory device column charging
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US Patent 7782693 Semiconductor memory device and operation control method thereof
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US Patent 7787304 Method of making integrated circuit embedded with non-volatile one-time-programmable and multiple-time programmable memory
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US Patent 7787309 Method of operating integrated circuit embedded with non-volatile one-time-programmable and multiple-time programmable memory
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US Patent 7791922 Semiconductor memory device
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US Patent 7791925 Structures for resistive random access memory cells
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US Patent 7796428 Thermally assisted magnetic write memory
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US Patent 7796453 Semiconductor device
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US Patent 7800944 Nonvolatile semiconductor memory device and programming method thereof
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US Patent 7800949 Memory and method for programming the same
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US Patent 7800953 Method and system for selectively limiting peak power consumption during programming or erase of non-volatile memory devices
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US Patent 7804728 Information handling system with SRAM precharge power conservation
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US Patent 7808812 Robust 8T SRAM cell
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US Patent 7808824 Interleaved memory program and verify method, device and system
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US Patent 7813166 Controlled value reference signal of resistance based memory circuit
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US Patent 7813210 Multiple-type memory
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US Patent 7817463 System and method to fabricate magnetic random access memory
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US Patent 7817494 Integrated circuit memory devices having internal command generators therein that support extended command sets using independent and dependent commands
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US Patent 7821817 Semiconductor storage device
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US Patent 7821827 Flash multi-level threshold distribution scheme
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US Patent 7821843 Partial write-back in read and write-back of a memory
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US Patent 7821848 External clock tracking pipelined latch scheme
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US Patent 7826256 STRAM with compensation element
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US Patent 7826264 Semiconductor integrated circuit device for driving liquid crystal display
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US Patent 7826265 Memory device with variable trim setting
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US Patent 7826270 Non-volatile semiconductor memory device and method of writing and reading the same
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US Patent 7826297 Power supply switching circuit
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US Patent 7830692 Multi-chip memory device with stacked memory chips, method of stacking memory chips, and method of controlling operation of multi-chip package memory
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US Patent 7830721 Memory and reading method thereof
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US Patent 7835179 Non-volatile latch with low voltage operation
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US Patent 7835187 Boosting seed voltage for a memory device
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US Patent 7839701 Low voltage operation DRAM control circuits
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US Patent 7839710 Nano-electro-mechanical memory cells and devices
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US Patent 7843749 Multi-port memory device with serial input/output interface
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US Patent 7848149 Reducing the effects of noise in non-volatile memories through multiple reads
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US Patent 7848162 Semiconductor integrated circuit having write controlling circuit
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US Patent 7852671 Data path for multi-level cell memory, methods for storing and methods for utilizing a memory array
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US Patent 7852674 Dynamic cell bit resolution
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US Patent 7855929 Apparatus for the dynamic detection, selection and deselection of leaking decoupling capacitors
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US Patent 7859892 Magnetic random access memory with dual spin torque reference layers
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US Patent 7859897 Semiconductor memory device and driving method thereof
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US Patent 7864574 Memory device and memory programming method
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US Patent 7864616 Bulk voltage detector
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US Patent 7876592 System and method for supporting standard and voltage optimized DIMMs
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US Patent 7876624 Data input circuit and semiconductor memory device including the same
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US Patent 7881112 Program and erase methods with substrate transient hot carrier injections in a non-volatile memory
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US Patent 7885118 Flash memory device and voltage generating circuit for the same
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US Patent RE42144 Non-volatile memory comprising means for distorting the output of memory cells
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US Patent 7889534 Semiconductor integrated circuit for supporting a test mode
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US Patent 7889545 Apparatus and method of nonvolatile memory device having three-level nonvolatile memory cells
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US Patent 7889581 Digital DLL circuit
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US Patent 7889591 ASIC including vertically stacked embedded non-flash re-writable non-volatile memory
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US Patent 7889594 Semiconductor memory device
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US Patent 7894239 Variable resistance element, method for producing the same, and nonvolatile semiconductor storage device
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US Patent 7894241 Memory cell array and semiconductor memory device including the same
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US Patent 7894244 Tunnel magnetic resistance device, and magnetic memory cell and magnetic random access memory using the same
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US Patent 7894261 PFET nonvolatile memory
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US Patent 7894278 Semiconductor memory device and method for operating the same
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US Patent 7894283 Integrated circuit including selectable address and data multiplexing mode
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US Patent 7898833 Magnetic element with thermally-assisted writing
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US Patent 7898841 Preservation circuit and methods to maintain values representing data in one or more layers of memory
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US Patent 7898878 Methods and apparatus for strobe signaling and edge detection thereof
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US Patent 7898880 Dual port memory device, memory device and method of operating the dual port memory device
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US Patent 7898897 Circuit and method for generating word line off voltage
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US Patent 7903446 Semiconductor memory device
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US Patent 7903455 Magnetic memory device
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US Patent 7907441 Data management method and mapping table update method in non-volatile memory device
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US Patent 7907447 Secure non-volatile memory device and method of protecting data therein
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US Patent 7911852 Nonvolatile semiconductor memory device and operation method thereof
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US Patent 7911871 Semiconductor memory device operational processing device and storage system
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US Patent 7916515 Non-volatile memory read/write verify
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US Patent 7916522 Semiconductor memory device
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US Patent 7916544 Random telegraph signal noise reduction scheme for semiconductor memories
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US Patent 7916545 Semiconductor memory device including stacked gate having charge accumulation layer and control gate and method of writing data to semiconductor memory device
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US Patent 7920426 Non-volatile memory programmable through areal capacitive coupling
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US Patent 7929365 Memory structure, programming method and reading method therefor, and memory control circuit thereof
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US Patent 7929369 Semiconductor memory device having refresh circuit and word line activating method therefor
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US Patent 7936594 Semiconductor memory devices having core structures for multi-writing
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US Patent 7936611 Memory device and method of operating and fabricating the same
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US Patent 7944737 Magnetic memory cell based on a magnetic tunnel junction (MTJ) with independent storage and read layers
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US Patent 7948794 Nonvolatile memory device using variable resistive element
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US Patent 7948796 Nonvolatile semiconductor memory device and method for controlling the same
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US Patent 7957183 Single bit line SMT MRAM array architecture and the programming method
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US Patent 7961488 Method for modifying data more than once in a multi-level cell memory location within a memory array
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US Patent 7961493 Programmable device
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US Patent 7961502 Non-volatile state retention latch
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US Patent 7961516 NAND flash memory and memory system
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US Patent 7965574 Table lookup voltage compensation for memory cells
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US Patent 7965581 System with controller and memory
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US Patent 7969808 Memory cell structures, memory arrays, memory devices, memory controllers, and memory systems, and methods of manufacturing and operating the same
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US Patent 7969810 256 Meg dynamic random access memory
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US Patent 7978497 Nonvolatile semiconductor memory device
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US Patent 7983088 Programming in a memory device
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US Patent 7983105 Antifuse replacement determination circuit and method of semiconductor memory device
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US Patent 7986574 Data input circuit technical field
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US Patent 7990748 Information holding method
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US Patent 7990757 Method of operating a memory circuit using memory cells with independent-gate controlled access devices
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US Patent 7990779 Method of operating semiconductor devices
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US Patent 7990794 Semiconductor apparatuses and methods of operating the same
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US Patent 7995396 Methods of operating memory devices
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US Patent 7995411 Sensing and latching circuit for memory arrays
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US Patent 8000128 Structures for resistive random access memory cells
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US Patent 8000132 Method for efficiently driving a phase change memory device
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US Patent 8000136 Non-volatile memory with both single and multiple level cells
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US Patent 8004878 Semiconductor device and method for designing the same
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US Patent 8004890 Operation method of non-volatile memory
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US Patent 8004892 Single latch data circuit in a multiple level cell non-volatile memory device
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US Patent 8004897 Interleaved memory program and verify method, device and system
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US Patent 8004907 SRAM with read and write assist
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US Patent 8004909 Data bus power-reduced semiconductor storage apparatus
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US Patent 8004909 Data bus power-reduced semiconductor storage apparatus
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US Patent 8004892 Single latch data circuit in a multiple level cell non-volatile memory device
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US Patent 8004907 SRAM with read and write assist
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edited on 8 Dec, 2021
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US Patent 8004897 Interleaved memory program and verify method, device and system
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US Patent 8004890 Operation method of non-volatile memory
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US Patent 8004878 Semiconductor device and method for designing the same
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edited on 8 Dec, 2021
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US Patent 8000136 Non-volatile memory with both single and multiple level cells
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 8000132 Method for efficiently driving a phase change memory device
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edited on 8 Dec, 2021
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US Patent 8000128 Structures for resistive random access memory cells
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7995396 Methods of operating memory devices
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7995411 Sensing and latching circuit for memory arrays
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edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7990794 Semiconductor apparatuses and methods of operating the same
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edited on 8 Dec, 2021
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US Patent 7990779 Method of operating semiconductor devices
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edited on 8 Dec, 2021
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US Patent 7990748 Information holding method
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US Patent 7986574 Data input circuit technical field
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US Patent 7983105 Antifuse replacement determination circuit and method of semiconductor memory device
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US Patent 7983088 Programming in a memory device
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US Patent 7978497 Nonvolatile semiconductor memory device

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