Patent attributes
A NOR flash memory includes a plurality of main cells, a plurality of main word lines, a plurality of dummy cells, and a plurality of dummy word lines. The main cells are electrically connected to a bit line and are arranged in a pattern. The main word lines are each electrically connected to a respective one of the main word lines. The dummy cells are electrically connected to the bit line and located adjacent to outermost ones of the main cells. The dummy word lines are each electrically connected to a respective one of the dummy cells. At least some of the dummy word lines form a first group that is supplied with a first erase voltage and at least some other ones of the dummy word lines form a second group that is supplied with a second erase voltage that is different from the first erase voltage.
