Patent attributes
In a power supply switching circuit, a transistor that switches to a highest voltage is formed of an enhancement type PMOS transistor, and transistors that switch other voltages are each formed of a depletion type NMOS transistor. A signal for controlling a gate of each of the transistors is input through a level shifter. The depletion type NMOS transistor does not operate in a bipolar manner even if a source voltage thereof reaches a power supply voltage VPP1 or VPP2, and the enhancement type PMOS transistor does not operate in the bipolar manner even if a gate voltage and a source voltage thereof reach the power supply voltage VPP1, and a drain voltage thereof reaches the power supply voltage VPP2. Accordingly, there can be provided the power supply voltage switching circuit that is high in efficiency.