US Patent 7623395 Buffer circuit and buffer control method

A buffer circuit includes a storage unit having a first storage capacity that stores data based on a write request inputted from an outside and outputs the data in an order in which the data was written, based on a read request inputted from the outside. And a second storage capacity in the first storage capacity which is used to store the data is adjusted based on an amount of valid data which has been written into the storage unit but has not been read from the storage unit.