Patent attributes
A non-volatile semiconductor storage apparatus includes a memory cell array including at least one memory cell unit in which multiple electrically rewritable non-volatile memory cells are serially connected, multiple control gate lines connecting to a control terminal for the multiple memory cells, a bit line connecting to the memory cell unit, means for selecting the control gate line, means for selecting the bit line, an externally input single power supply terminal, and an externally input ground potential terminal. In this case, the voltage equal to or lower than the voltage of the externally input single power supply is applied to the control gate line in reading out stored data in the memory cells.