Is a
Patent attributes
Patent Jurisdiction
Patent Number
Date of Patent
September 29, 2009
Patent Application Number
11542726
Date Filed
October 4, 2006
Patent Primary Examiner
Patent abstract
A circuit for reading data from a buffer memory, which is Synchronous Dynamic Random access Memory (“SDRAM”), or Double Data Rate-Synchronous Dynamic Random Access Memory (“DDR”) comprises logic for managing programmable clock signal relationships such that data that is read from the DDR is centered within a DQS signal which is generated from the DDR and then appropriately delayed.
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