US Patent 7403444 Selectable memory word line deactivation

Circuitry and methods allow selected memory word lines (WLs) to be deactivated without using a global deactivate signal. All active WLs do not therefore have to be deactivated simultaneously, which can cause voltage at a common deactivate node to rise undesirably. This undesirable voltage rise can adversely affect a system by, for example, inadvertently activating an inactive WL. The invention advantageously limits the voltage fluctuation at the common deactivate node.