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Hoai V Pham
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Edits on 14 Dec, 2021
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Golden AI
edited on 14 Dec, 2021
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Patent primary examiner of
US Patent 11171141 Gap fill methods of forming buried word lines in DRAM without forming bottom voids
US Patent 11171155 Multi-layer semiconductor element, semiconductor device, and electronic device for storage, and method of manufacturing the same
US Patent 11177182 Vertical transistor device comprising a two-dimensional (2D) material positioned in a channel region of the device and methods of making such vertical transistor devices
US Patent 11177264 Semiconductor devices including a gate structure having multiple widths
US Patent 11177330 Organic light emitting display panel including a plurality organic and inorganic layers
US Patent 7288807 Semiconductor device with capacitor element
US Patent 7291924 Flip chip stacked package
US Patent 7304341 Semiconductor device and method for fabricating the same
US Patent 7306986 Method of making a semiconductor device, and semiconductor device made thereby
US Patent 7312493 Semiconductor device and method of manufacturing the same
US Patent 7314818 Semiconductor device and method of manufacturing the same, circuit board, and electronic equipment
US Patent 7316943 Method for manufacturing semiconductor apparatus having drain/source on insulator
US Patent 7316945 Method of fabricating a fin field effect transistor in a semiconductor device
US Patent 7319256 Shielded gate trench FET with the shield and gate electrodes being connected together
US Patent 7319269 Semiconductor device power interconnect striping
US Patent 7321163 Semiconductor device including a plurality of circuit element chips and a manufacturing method thereof
US Patent 7323382 Intralevel decoupling capacitor, method of manufacture and testing circuit of the same
US Patent 7323738 MIS capacitor and method of formation
US Patent 7326984 MIS capacitor and method of formation
US Patent 7326986 Trench memory
US Patent 7327039 Nanoparticle filled underfill
US Patent 7327042 Interconnection structure of electric conductive wirings
US Patent 7329584 Method for manufacturing bipolar transistor
US Patent 7331737 Method of forming a semiconductor device having bonding pad of the second chip thinner than bonding pad of the first chip
US Patent 7332793 Semiconductor device
US Patent 7335552 Electrode for thin film capacitor devices
US Patent 7335928 Semiconductor device having a metal conductor in ohmic contact with the gate region on the bottom of each the first groove
US Patent 7335937 Nonvolatile semiconductor memory
US Patent 7335984 Microfluidics chips and methods of using same
US Patent 7335994 Semiconductor component having multiple stacked dice
US Patent 7339225 Capacitor structure
US Patent 7342305 Thermally enhanced cavity-down integrated circuit package
US Patent 7345333 Double sided container process used during the manufacture of a semiconductor device
US Patent 7345346 Field effect transistor having contact plugs in the source region greater than in the drain region
US Patent 7348632 NMOS device formed on SOI substrate and method of fabricating the same
US Patent 7348649 Transparent conductive film
US Patent 7348672 Interconnects with improved reliability
US Patent 7348675 Microcircuit fabrication and interconnection
US Patent 7352070 Polymer encapsulated electrical devices
US Patent RE40222 Electronic semiconductor power device with integrated diode
US Patent 7354854 Nickel silicide method and structure
US Patent 7355221 Field effect transistor having an asymmetrically stressed channel region
US Patent 7355222 Imaging device having a pixel cell with a transparent conductive interconnect line and the method of making the pixel cell
US Patent 7355232 Memory devices with dual-sided capacitors
US Patent 7358124 Thin film transistor array panel and manufacturing method thereof
US Patent 7358128 Method for manufacturing a transistor
US Patent 7364944 Method for fabricating thermally enhanced semiconductor package
US Patent 7364959 Method for manufacturing a MOS transistor
US Patent 7368402 Systems and methods for forming tantalum oxide layers and tantalum precursor compounds
US Patent 7368748 Test pixel and test pixel array for evaluating pixel quality in CMOS image sensor
US Patent 7371635 Semiconductor device and method of manufacturing the same
US Patent 7372150 Semiconductor wafer having identification indication
US Patent 7375378 Surface passivated photovoltaic devices
US Patent 7378307 Gate of a semiconductor device and method for forming the same
US Patent 7378688 Method and apparatus for a low noise JFET device on a standard CMOS process
US Patent 7378712 Gate stacks
US Patent 7378733 Composite flip-chip package with encased components and method of fabricating same
US Patent 7378740 Dual damascene structure for the wiring-line structures of multi-level interconnects in integrated circuit
US Patent 7381989 Semiconductor device including upper and lower transistors and interconnection between upper and lower transistors
US Patent 7381993 High-breakdown-voltage insulated gate semiconductor device
US Patent 7382027 MOSFET device with low gate contact resistance
US Patent 7385256 Transistor arrangement in monocrystalline substrate having stress exerting insulators
US Patent 7388237 Local collector implant structure for heterojunction bipolar transistors
US Patent 7390720 Local collector implant structure for heterojunction bipolar transistors and method of forming the same
US Patent 7391052 TFT structure for suppressing parasitic MOSFET in active display
US Patent 7391057 High voltage silicon carbide devices having bi-directional blocking capabilities
US Patent 7394107 Light guide plate, surface light source device and display
US Patent 7397079 Non-volatile memory device and methods of forming the same
US Patent 7397127 Bonding and probing pad structures
US Patent 7402873 Semiconductor integrated circuit device having deposited layer for gate insulation
US Patent 7405121 Semiconductor device with capacitors and its manufacture method
US Patent 7408219 Nonvolatile semiconductor memory device
US Patent 7411243 Nonvolatile semiconductor device and method of fabricating the same
US Patent 7417259 Light-emitting device having light-emitting elements
US Patent 7419864 Semiconductor device and method of manufacturing the same
US Patent 7420258 Semiconductor device having trench structures and method
US Patent 7429754 Semiconductor device, its manufacture method and electronic component unit
US Patent 7435639 Dual surface SOI by lateral epitaxial overgrowth
US Patent 7439097 Taped lead frames and methods of making and using the same in semiconductor packaging
US Patent 7442617 Method for manufacturing bipolar transistor
US Patent 7442969 Top layers of metal for high performance IC's
US Patent 7442978 Semiconductor memory device including multi-layer gate structure
US Patent 7445955 Multichip module package and fabrication method
US Patent 7445956 Flexible MEMS thin film without manufactured substrate and process for producing the same
US Patent 7445988 Trench memory
US Patent 7446364 Semiconductor memory device including multi-layer gate structure
US Patent 7446390 Semiconductor device
US Patent 7452764 Gate-induced strain for MOS performance improvement
US Patent 7453146 High power MCM package with improved planarity and heat dissipation
US Patent 7459339 Flip-chip semiconductor device manufacturing method
US Patent 7462546 Collector tailored structures for integration of binary junction transistors
US Patent 7465955 Thin-film transistor and method of fabricating same
US Patent 7465975 Top layers of metal for high performance IC's
US Patent 7465984 Nonvolatile memory element
US Patent 7465988 Semiconductor device and method of manufacturing the same
US Patent 7468289 Solid-state imaging device and method for manufacturing the same
US Patent 7473603 Method for forming a shielded gate trench FET with the shield and gate electrodes being connected together
US Patent 7473610 Local collector implant structure for heterojunction bipolar transistors and method of forming the same
US Patent 7474008 Semiconductor device with reduced electromigration
US Patent 7476572 Method for manufacturing thin film transistor
US Patent 7479401 Front side illuminated photodiode with backside bump
US Patent 7479436 Feed forward silicide control scheme based on spacer height controlling preclean time
US Patent 7482202 Semiconductor device including a plurality of circuit element chips and a manufacturing method thereof
US Patent 7482650 Method of manufacturing a semiconductor integrated circuit device having a columnar laminate
US Patent 7491597 Flash memory device capable of erasing flash blocks in SOI substrate based on back-bias, method for manufacturing the same, and flash block erasion method and structure thereof
US Patent 7494912 Terminal pad structures and methods of fabricating same
US Patent 7495328 Micromechanical component
US Patent 7498184 Production method for semiconductor device
US Patent 7501319 Manufacturing a semiconductor device including sidewall floating gates
US Patent 7501656 Light emitting diode package with diffuser and method of manufacturing the same
US Patent 7504696 CMOS with dual metal gate
US Patent 7508064 Package for sealing an integrated circuit die
US Patent 7510885 Method of preparing electronically connected optoelectronic devices, and optoelectronic devices
US Patent 7510886 Method of manufacturing semiconductor photodetector
US Patent 7510962 Method for producing an anisotropic conductive film on a substrate
US Patent 7511331 Semiconductor device having side wall spacers
US Patent 7511361 DFN semiconductor package having reduced electrical resistance
US Patent 7514739 Nonvolatile semiconductor device and method of fabricating the same
US Patent 11189646 Display substrate including signal line electrically connected to conductive pattern through the plurality of via holes
US Patent 7518151 Gallium nitride/sapphire thin film having reduced bending deformation
US Patent 7518205 Semiconductor package and method for manufacturing the same
US Patent 7521266 Production and packaging control for repaired integrated circuits
US Patent 7525160 Multigate device with recessed strain regions
US Patent 7531399 Semiconductor devices and methods with bilayer dielectrics
US Patent 7531880 Semiconductor device and manufacturing method thereof
US Patent 7535052 Method of fabricating non-volatile memory integrated circuit device and non-volatile memory integrated circuit device fabricated using the same
US Patent 7535055 Trench transistor
US Patent 7535064 Semiconductor device having a fin and method of manufacturing the same
US Patent 7535079 Semiconductor device comprising passive components
US Patent 7537944 Method for manufacturing p-type group III nitride semiconductor, and group III nitride semiconductor light-emitting device
US Patent 7537989 Method for manufacturing SOI substrate
US Patent 7538345 Inspection method of contact failure of semiconductor device and semiconductor device to which inspection method is applied
US Patent 7538369 Resistance-change-type fuse circuit
US Patent 7541237 Non-volatile memory cell array having discontinuous source and drain diffusions contacted by continuous bit line conductors and methods of forming
US Patent 7541664 Lead frame and semiconductor device having the lead frame
US Patent 7545003 Defect-free source/drain extensions for MOSFETS having germanium based channel regions
US Patent 7547596 Method of enhancing drive current in a transistor
US Patent 7550772 Image display device and manufacturing method thereof
US Patent 7550773 FinFET with top body contact
US Patent 7550809 Semiconductor integrated circuit device having deposited layer for gate insulation
US Patent 7554117 Semiconductor device and manufacturing method thereof
US Patent 7554173 Semiconductor device
US Patent 7556996 Field effect transistor comprising a stressed channel region and method of forming the same
US Patent 7557369 Display and method for manufacturing the same
US Patent 7557407 Recessed gate structure and method for preparing the same
US Patent 7564091 Memory device and methods for its fabrication
US Patent 7569472 Method and apparatus of power ring positioning to minimize crosstalk
US Patent 7569903 Component arrangement having a transistor and an open-load detector
US Patent 7572685 Method of manufacturing thin film transistor
US Patent 7573125 Methods for reducing stress in microelectronic devices and microelectronic devices formed using such methods
US Patent 7573128 Semiconductor module in which a semiconductor package is bonded on a mount substrate
US Patent 7576370 Low operating voltage electro-static discharge device and method
US Patent 7579612 Resistive memory device having enhanced resist ratio and method of manufacturing same
US Patent 7582521 Dual metal gates for mugfet device
US Patent 7582925 Integrated circuit devices including insulating support layers
US Patent 7588955 Method for promoting light emission efficiency of LED using nanorods structure
US Patent 7589372 Nonvolatile memory device and method for fabricating the same
US Patent 7592245 Poly filled substrate contact on SOI structure
US Patent 7592691 High density stacked die assemblies, structures incorporated therein and methods of fabricating the assemblies
US Patent 7595247 Halo-first ultra-thin SOI FET for superior short channel control
US Patent 7595551 Semiconductor package for a large die
US Patent 7598108 Gallium nitride-on-silicon interface using multiple aluminum compound buffer layers
US Patent 7598560 Hetero-bimos injection process for non-volatile flash memory
US Patent 7601564 Semiconductor device including memory cell and anti-fuse element
US Patent 7605397 Capacitive bypass
US Patent 7605445 Sealed nitride layer for integrated circuits
US Patent 7611941 Method for manufacturing a memory cell arrangement
US Patent 7611945 Method and resulting structure for fabricating DRAM capacitor structure
US Patent 7615437 Non-volatile memory device and method of manufacturing the same
US Patent 7615476 Electromigration-resistant and compliant wire interconnects, nano-sized solder compositions, systems made thereof, and methods of assembling soldered packages
US Patent 7618846 Semiconductor device and method of forming shielding along a profile disposed in peripheral region around the device
US Patent 7632723 Thin film transistor array panel and manufacturing method thereof
US Patent 7633092 Omni-directional LED light source
US Patent 7635870 LED packaging structure
US Patent 7638840 Semiconductor storage device and semiconductor integrated circuit
US Patent 7638848 Semiconductor apparatus with improved ESD withstanding voltage
US Patent 7642138 Split-channel antifuse array architecture
US Patent 7642186 Metal line of semiconductor device and method of forming the same
US Patent 7642571 Substrate core
US Patent 7642624 Semiconductor device having a guard ring
US Patent 7646061 Power semiconductor component with charge compensation structure and method for producing the same
US Patent 7648855 Device comprising an encapsulated microsystem and production method thereof
US Patent 7659158 Atomic layer deposition processes for non-volatile memory devices
US Patent 7659559 Semiconductor package having insulated metal substrate and method of fabricating the same
US Patent 7663165 Transparent-channel thin-film transistor-based pixels for high-performance image sensors
US Patent 7666692 Semiconductor device, its manufacture method and electronic component unit
US Patent 7667255 Deep trench inter-well isolation structure
US Patent 7667267 Semiconductor device having LDMOS transistor and method for manufacturing the same
US Patent 7671353 Integrated circuit having contact including material between sidewalls
US Patent 7674677 Semiconductor device and a method for manufacturing the same
US Patent 7675052 Nonvolatile memory device and fabrication method thereof
US Patent 7675141 Semiconductor device and method of manufacturing the same
US Patent 7675163 Carbon nanotubes for active direct and indirect cooling of electronics device
US Patent 7678635 Method of producing a transistor
US Patent 7679074 Integrated circuit having multilayer electrode
US Patent 7682903 Method of forming a power device
US Patent 7691685 Method for manufacturing semiconductor device
US Patent 7692194 Semiconductor device
US Patent 7692259 Solid-state element device
US Patent 7696006 Composite flip-chip package with encased components and method of fabricating same
US Patent 7700427 Integrated circuit having a Fin structure
US Patent 7701004 Semiconductor device and method of manufacturing thereof
US Patent 7705340 Inflected magnetoresistive structures and memory cells having inflected magnetoresistive structures
US Patent 7709315 Semiconductor device and method of manufacturing the same
US Patent 7713797 Pixel structure and manufacturing method thereof
US Patent 7723132 Semiconductor laser and the method for manufacturing the same
US Patent 7723797 Fin field effect transistor and method of manufacturing the same
US Patent 7723853 Chip package without core and stacked chip package structure
US Patent 7727778 Magnetoresistive element and method of manufacturing the same
US Patent 7728402 Semiconductor devices including schottky diodes with controlled breakdown
US Patent 7737543 Semiconductor device and method of manufacturing the same
US Patent 7741149 Method of fabricating chip package structure
US Patent 7741167 Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain
US Patent 7741665 High-quality CMOS image sensor and photo diode
US Patent 7745257 High power MCM package with improved planarity and heat dissipation
US Patent 7745877 Semiconductor device and manufacturing method thereof
US Patent 7745907 Semiconductor package including connector disposed in troughhole
US Patent 7749850 Method for manufacturing semiconductor device
US Patent 7750346 Semiconductor structure and method for manufacturing the same
US Patent 7750401 Self-aligned complementary LDMOS
US Patent 7750449 Packaged semiconductor components having substantially rigid support members and methods of packaging semiconductor components
US Patent 7754600 Methods of forming nanostructures on metal-silicide crystallites, and resulting structures and devices
US Patent 7755162 Anti-fuse memory cell
US Patent 7759777 Semiconductor module
US Patent 7763477 Fabrication of semiconductor devices
US Patent 7763478 Methods of forming semiconductor light emitting device packages by liquid injection molding
US Patent 7763508 Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods
US Patent 7763928 Multi-time programmable memory
US Patent 7768067 DMOS transistor
US Patent 7768099 MIM capacitor integrated into the damascene structure and method of making thereof
US Patent 7768101 Semiconductor device having an insulated gate bipolar transistor and a free wheel diode
US Patent 7776655 Semiconductor device and method of forming conductive pillars in recessed region of peripheral area around the device for electrical interconnection to other devices
US Patent 7776677 Method of forming an EEPROM device and structure therefor
US Patent 7781265 DFN semiconductor package having reduced electrical resistance
US Patent 7785960 Vertical channel transistor in semiconductor device and method of fabricating the same
US Patent 7790482 Light emitting diode package with diffuser and method of manufacturing the same
US Patent 7791089 LED packaging methods and LED-based lighting products
US Patent 7795133 Semiconductor device and method of manufacturing the same
US Patent 7795665 Flash memory
US Patent 7799623 Method for manufacturing semiconductor device having LDMOS transistor
US Patent RE41764 Semiconductor device with compensated threshold voltage and method for making same
US Patent 7807478 Nonvolatile memory device and fabrication method thereof
US Patent 7808052 Semiconductor device and method of forming the same
US Patent 7811878 Method of manufacturing SOI substrate
US Patent 7811882 Hardmask manufacture in ferroelectric capacitors
US Patent 7812386 Semiconductor memory device including multi-layer gate structure
US Patent 7812429 Semiconductor device and manufacturing method of the same
US Patent 7824951 Method of fabricating an integrated circuit having a memory including a low-k dielectric material
US Patent 7824970 Semiconductor structure and method for manufacturing the same
US Patent 7825454 Method of forming an EEPROM device and structure therefor
US Patent 7829361 Methods for making a pixel cell with a transparent conductive interconnect line for focusing light
US Patent 7829452 Terminal pad structures and methods of fabricating same
US Patent 7829960 Semiconductor pressure sensor, method for producing the same, semiconductor device, and electronic apparatus
US Patent 7829995 Semiconductor device and method of fabrication
US Patent 7833838 Method and apparatus for increasing the immunity of new generation microprocessors from ESD events
US Patent 7834430 Drop-mold conformable material as an encapsulation for an integrated circuit package system
US Patent 7842545 Semiconductor package having insulated metal substrate and method of fabricating the same
US Patent 7843074 Underfill for light emitting device
US Patent 7851357 Method of forming electrodeposited contacts
US Patent 7851842 Vertical channel transistor in semiconductor device and method of fabricating the same
US Patent 7851855 Semiconductor device and a method for manufacturing the same
US Patent 7855382 Pixel structure
US Patent 7859047 Shielded gate trench FET with the shield and gate electrodes connected together in non-active region
US Patent 7859061 Halo-first ultra-thin SOI FET for superior short channel control
US Patent 7863654 Top layers of metal for high performance IC's
US Patent 7863716 Method and apparatus of power ring positioning to minimize crosstalk
US Patent 7871875 Fin field effect transistor and method of manufacturing the same
US Patent 7872305 Shielded gate trench FET with an inter-electrode dielectric having a nitride layer therein
US Patent 7875517 Self-aligned complementary LDMOS
US Patent 7875551 Methods of forming integrated circuit devices using contact hole spacers to improve contact isolation
US Patent 7879627 Overlay marks and methods of manufacturing such marks
US Patent 7880275 Semiconductor device and method of forming shielding along a profile disposed in peripheral region around the device
US Patent 7884365 Thin film transistor array panel and manufacturing method thereof
US Patent 7888744 Strained semiconductor, devices and systems and methods of formation
US Patent 7888777 Semiconductor device and method for manufacturing the same
US Patent 7892926 Fuse link structures using film stress for programming and methods of manufacture
US Patent 7893473 Semiconductor memory device and method of fabricating the same
US Patent 7893503 Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain
US Patent RE42180 Semiconductor device having metal silicide layer on source/drain region and gate electrode and method of manufacturing the same
US Patent 7897432 Method for producing electronic part package
US Patent 7897955 Programmable resistive memory cell with filament placement structure
US Patent 7898059 Semiconductor device comprising passive components
US Patent 7906386 Semiconductor device and method of fabricating the same
US Patent 7906387 Method for manufacturing a transistor
US Patent 7910417 Distributed high voltage JFET
US Patent 7910418 Complementary metal gate dense interconnect and method of manufacturing
US Patent 7910469 Electrical circuit, thin film transistor, method for manufacturing electric circuit and method for manufacturing thin film transistor
US Patent 7910471 Bumpless wafer scale device and board assembly
US Patent 7911045 Semiconductor element and semiconductor device
US Patent 7915672 Semiconductor device having trench shield electrode structure
US Patent 7915687 Semiconductor device and method for fabricating the same
US Patent 7915726 Interconnecting substrates for microelectronic dies, methods for forming vias in such substrates, and methods for packaging microelectronic devices
US Patent 7915733 Semiconductor device
US Patent 7919354 Asymmetric alignment of substrate interconnect to semiconductor die
US Patent 7919790 Semiconductor device and method of producing the same
US Patent 7919824 Semiconductor device and method of manufacturing the same
US Patent 7919874 Chip package without core and stacked chip package structure
US Patent 7923341 Higher selectivity, method for passivating short circuit current paths in semiconductor devices
US Patent 7923804 Edge termination with improved breakdown voltage
US Patent 7923831 LED-based light source having improved thermal dissipation
US Patent 7927896 Method of production of semiconductor light emission device and method of production of light emission apparatus
US Patent 7927903 Capacitive bypass
US Patent 7927942 Selective silicide process
US Patent 7928469 MOSFET and method for manufacturing MOSFET
US Patent 7928490 Vertical transistor and vertical transistor array
US Patent 7928493 Nonvolatile memory device with multiple blocking layers and method of fabricating the same
US Patent 7928505 Semiconductor device with vertical trench and lightly doped region
US Patent 7936019 Nano and MEMS power sources and methods thereof
US Patent 7936044 Non-volatile memory devices and methods of fabricating the same
US Patent 7939404 Manufacturing method of capacitor in semiconductor
US Patent 7939859 Solid state imaging device and method for manufacturing the same
US Patent 7939891 Semiconductor device having MISFETs and manufacturing method thereof
US Patent 7943995 NMOS device, PMOS device, and SiGe HBT device formed on SOI substrate and method of fabricating the same
US Patent 7944052 Semiconductor device
US Patent 7947516 LED packaging methods and LED-based lighting products
US Patent 7947526 Method of making backside illumination image sensor
US Patent 7947529 Microelectronic die packages with leadframes, including leadframe-based interposer for stacked die packages, and associated systems and methods
US Patent 7947550 Method of forming semiconductor device
US Patent 7948058 Semiconductor device and semiconductor integrated circuit device for driving plasma display using the semiconductor device
US Patent 7948083 Reliable BEOL integration process with direct CMP of porous SiCOH dielectric
US Patent 7955910 Semiconductor device and manufacturing method thereof
US Patent 7960253 Thin silicon wafer with high gettering ability and production method thereof
US Patent 7960763 Semiconductor device and method of manufacturing the same
US Patent 7964941 Semiconductor device and manufacturing method of the same
US Patent 7968355 Luminous devices, packages and systems containing the same, and fabricating methods thereof
US Patent 7968383 Electronic device and method of manufacturing the same
US Patent 7968866 Light emitting device and display
US Patent 7968927 Memory array for increased bit density and method of forming the same
US Patent 7977190 Memory devices having reduced interference between floating gates and methods of fabricating such devices
US Patent 7981723 Capped wafer method and apparatus
US Patent 7981789 Feature patterning methods and structures thereof
US Patent 7985637 Manufacturing method for compound semiconductor device and etching solution
US Patent 7985645 Semiconductor device having a high aspect cylindrical capacitor and method for fabricating the same
US Patent 7986013 Semiconductor device having SiGe semiconductor regions
US Patent 7986014 Semiconductor device
US Patent 7989274 Display device having oxide thin film transistor and fabrication method thereof
US Patent 7989953 Flip chip power switch with under bump metallization stack
US Patent 7994053 Patterning method of metal oxide thin film using nanoimprinting, and manufacturing method of light emitting diode
US Patent 7994522 Organic light emitting element and organic light emitting device
US Patent 7994619 Bridge stack integrated circuit package system
US Patent 7999363 Structure and method for self protection of power device
US Patent 8003457 Fabricating method of vertical transistor
US Patent 8004075 Semiconductor power module including epoxy resin coating
US Patent 8008120 Method for producing electronic part package
US Patent 8012820 Ultra-thin SOI CMOS with raised epitaxial source and drain and embedded SiGe PFET extension
Edits on 13 Dec, 2021
Golden AI
edited on 13 Dec, 2021
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Patent primary examiner of
US Patent 8012820 Ultra-thin SOI CMOS with raised epitaxial source and drain and embedded SiGe PFET extension
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 8008120 Method for producing electronic part package
Golden AI
edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
US Patent 8004075 Semiconductor power module including epoxy resin coating
Golden AI
edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
US Patent 8003457 Fabricating method of vertical transistor
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7999363 Structure and method for self protection of power device
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7994619 Bridge stack integrated circuit package system
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7994522 Organic light emitting element and organic light emitting device
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7994053 Patterning method of metal oxide thin film using nanoimprinting, and manufacturing method of light emitting diode
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7989953 Flip chip power switch with under bump metallization stack
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7989274 Display device having oxide thin film transistor and fabrication method thereof
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7986014 Semiconductor device
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7986013 Semiconductor device having SiGe semiconductor regions
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7985645 Semiconductor device having a high aspect cylindrical capacitor and method for fabricating the same
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7985637 Manufacturing method for compound semiconductor device and etching solution
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7981789 Feature patterning methods and structures thereof
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7981723 Capped wafer method and apparatus
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7977190 Memory devices having reduced interference between floating gates and methods of fabricating such devices
Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
US Patent 7968927 Memory array for increased bit density and method of forming the same
Golden AI
edited on 8 Dec, 2021
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Infobox
Patent primary examiner of
US Patent 7968866 Light emitting device and display
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