Create
Log in
Sign up
Golden has been acquired by ComplyAdvantage.
Read about it here ⟶
Quoc D Hoang
Overview
Structured Data
Issues
Contributors
Activity
All edits
Edits on 14 Dec, 2021
"Remove inverse infobox"
Golden AI
edited on 14 Dec, 2021
Edits made to:
Infobox
(
-301
properties)
Infobox
Patent primary examiner of
US Patent 11170998 Method and apparatus for depositing a metal containing layer on a substrate
US Patent 11171106 Semiconductor package structure with circuit substrate and manufacturing method thereof
US Patent 11177344 Multi-gate device with air gap spacer and fabrication methods thereof
US Patent 11177361 FinFET and gate-all-around FET with selective high-k oxide deposition
US Patent 7390736 EMI and noise shielding for multi-metal layer high frequency integrated circuit processes
US Patent 7396745 Formation of ultra-shallow junctions by gas-cluster ion irradiation
US Patent 7399690 Methods of fabricating semiconductor devices and structures thereof
US Patent 7402488 Method of manufacturing a semiconductor memory device
US Patent 7407830 CMOS image sensor and method of fabrication
US Patent 7411254 Semiconductor substrate
US Patent 7413933 Integrated circuit package with leadframe locked encapsulation and method of manufacture therefor
US Patent 7413944 CMOS image sensor and method of manufacturing the same
US Patent 7414266 Semiconductor device and manufacturing method thereof
US Patent 7416994 Atomic layer deposition systems and methods including metal beta-diketiminate compounds
US Patent 7419845 Methods of making electromechanical three-trace junction devices
US Patent 7419851 Method of making a semiconductor chip assembly with a metal containment wall and a solder terminal
US Patent 7420230 MOSFET-type semiconductor device, and method of manufacturing the same
US Patent 7420263 DBG system and method with adhesive layer severing
US Patent 7422924 Image device and photodiode structure
US Patent 7422986 Deposition methods utilizing microwave excitation
US Patent 7425494 Method for forming void-free trench isolation layer
US Patent 7427788 Multi bridge channel field effect transistors with nano-wire channels and methods of manufacturing the same
US Patent 7432124 Method of making an organic light emitting device
US Patent 7435612 CMOS-MEMS process
US Patent 7435658 Method of manufacturing metal-oxide-semiconductor transistor
US Patent 7436061 Semiconductor device, electronic device, electronic apparatus, and method of manufacturing semiconductor device
US Patent 7439114 Laser anneal method of a semiconductor layer
US Patent 7439116 Apparatus and method for forming polycrystalline silicon thin film
US Patent 7439194 Lanthanide doped TiOx dielectric films by plasma oxidation
US Patent 7442587 Processes for forming backplanes for electro-optic displays
US Patent 7442622 Silicon direct bonding method
US Patent 7442654 Method of forming an oxide layer on a compound semiconductor structure
US Patent 7442987 Non-volatile memory devices including divided charge storage structures
US Patent 7445947 Method of manufacturing solid-state imaging device and solid-state imaging device
US Patent 7445980 Method and apparatus for improving stability of a 6T CMOS SRAM cell
US Patent 7446024 Method of forming nanowires with a narrow diameter distribution
US Patent 7446352 Dynamic array architecture
US Patent 7446397 Leadless semiconductor package
US Patent 7452745 Photodetecting device
US Patent 7452748 Strap assembly comprising functional block deposited therein and method of making same
US Patent 7452781 Method for manufacturing a semiconductor substrate, method for manufacturing a semiconductor device, and the semiconductor device
US Patent 7452783 Capacitor for a semiconductor device and method of forming the same
US Patent 7452806 Method of forming inductor in semiconductor device
US Patent 7452820 Radiation-resistant zone plates and method of manufacturing thereof
US Patent 7452822 Via plug formation in dual damascene process
US Patent 7453087 Thin-film transistor and thin-film diode having amorphous-oxide semiconductor layer
US Patent 7453113 Ultra scalable high speed heterojunction vertical n-channel MISFETs and methods thereof
US Patent 7456098 Building metal pillars in a chip for structure support
US Patent 7456447 Semiconductor integrated circuit device
US Patent 7456465 Split gate memory cell and method therefor
US Patent 7462543 Flash memory cell transistor with threshold adjust implant and source-drain implant formed using a single mask
US Patent 7462550 Method of forming a trench semiconductor device and structure therefor
US Patent 7462871 Side-view light emitting diode having protective device
US Patent 7462899 Semiconductor memory device having local etch stopper and method of manufacturing the same
US Patent 7465681 Method for producing smooth, dense optical films
US Patent 7468533 Terraced film stack
US Patent 7468534 Localized masking for semiconductor structure development
US Patent 7470571 Thin film transistor array substrate and method of producing the same
US Patent 7473581 Wafer stacking package method
US Patent 7473613 Terraced film stack
US Patent 7473627 Semiconducting device having a structure to improve contact processing margin, and method of fabricating the same
US Patent 7473984 Method for fabricating a metal-insulator-metal capacitor
US Patent 7476586 NOR flash memory cell with high storage density
US Patent 7479659 Process for manufacturing encapsulated optical sensors, and an encapsulated optical sensor manufactured using this process
US Patent 7482217 Forming metal-semiconductor films having different thicknesses within different regions of an electronic device
US Patent 7482254 Apparatus and methods for thermally processing undoped and lightly doped substrates without pre-heating
US Patent 7485946 Transistor epitaxial wafer and transistor produced by using same
US Patent 7488617 CMOS image sensor and method for manufacturing the same
US Patent 7491966 Semiconductor substrate and process for producing it
US Patent 7494856 Semiconductor fabrication process using etch stop layer to optimize formation of source/drain stressor
US Patent 7498235 Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates
US Patent 7501352 Method and system for forming an oxynitride layer
US Patent 7510936 Nonvolatile memory device and methods of fabricating and driving the same
US Patent 7511325 Ferroelectric capacitor
US Patent 7514336 Robust shallow trench isolation structures and a method for forming shallow trench isolation structures
US Patent 11189673 Organic light-emitting display device having first, second and third bank layers and method of fabricating the same
US Patent 7521360 Electroplating and electroless plating of conductive materials into openings, and structures obtained thereby
US Patent 7521726 Collimated LED array with reflector
US Patent 7524758 Interconnect structure and method for semiconductor device
US Patent 7525142 Semiconductor device including a conductive layer buried in an opening and method of manufacturing the same
US Patent 7528036 Non-volatile semiconductor memory and method of making same, and semiconductor device and method of making device
US Patent 7528039 Method of fabricating flash memory
US Patent 7534709 Semiconductor device and method of manufacturing the same
US Patent 7541217 Stacked chip structure and fabrication method thereof
US Patent 7545043 Device comprising multi-layered thin film having excellent adhesive strength and method for fabricating the same
US Patent 7563645 Electronic package having a folded package substrate
US Patent 7569401 Magnetic random access memory cells having split subdigit lines having cladding layers thereon and methods of fabricating the same
US Patent 7569404 Ink-jet printhead fabrication
US Patent 7569443 Complementary metal oxide semiconductor integrated circuit using raised source drain and replacement metal gate
US Patent 7569886 Semiconductor device and manufacture method thereof
US Patent 7572666 Reduced area intersection between electrode and programming element
US Patent 7572689 Method and structure for reducing induced mechanical stresses
US Patent 7576384 Storage device with multi-level structure
US Patent 7579201 Liquid crystal display device and method of fabricating the same
US Patent 7579266 Fuse structure for semiconductor integrated circuit with improved insulation film thickness uniformity and moisture resistance
US Patent 7579672 Semiconductor package with electromagnetic shielding capabilities
US Patent 7585702 Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate
US Patent 7586177 Semiconductor-on-insulator silicon wafer
US Patent 7592648 Integrated circuit arrangement with NPN and PNP bipolar transistors and corresponding production method
US Patent 7595205 Using reverse arrangement for trend test in statistical process control for manufacture of semiconductor integrated circuits
US Patent 7595508 Optical semiconductor device and method for fabricating the same
US Patent 7595521 Terraced film stack
US Patent 7598104 Method of forming a metal contact and passivation of a semiconductor feature
US Patent 7598147 Method of forming CMOS with Si:C source/drain by laser melting and recrystallization
US Patent 7601552 Semiconductor structure of liquid crystal display and manufacturing method thereof
US Patent 7601574 Methods for fabricating a stress enhanced MOS transistor
US Patent 7605074 Chemical mechanical polishing and method for manufacturing semiconductor device using the same
US Patent 7605080 Semiconductor device and method of manufacturing the same
US Patent 7605439 Antireflective hard mask compositions
US Patent 7605464 Semiconductor device
US Patent 7608518 Semiconductor device and method for fabricating the same
US Patent 7608526 Strained layers within semiconductor buffer structures
US Patent 7611929 Method for fabricating TFT array substrate
US Patent 7611965 Semiconductor device and manufacturing method thereof
US Patent 7619259 Semiconductor device integrated with heat sink and method of fabricating the same
US Patent 7626278 Chip package
US Patent 7629249 Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods
US Patent 7632726 Method for fabricating a nitride FET including passivation layers
US Patent 7632749 Semiconductor device having a pad metal layer and a lower metal layer that are electrically coupled, whereas apertures are formed in the lower metal layer below a center area of the pad metal layer
US Patent 7633094 Electroluminescence display panel, image display, and method for manufacturing them
US Patent 7633112 Metal-insulator-metal capacitor and method of manufacturing the same
US Patent 7635881 Continuous multigate transistors
US Patent 7635883 Method for manufacturing semiconductor device
US Patent 7635915 Apparatus and method for use in mounting electronic elements
US Patent 7635920 Method and apparatus for indicating directionality in integrated circuit manufacturing
US Patent 7638349 Substrate preparation method for a MEMS fabrication process
US Patent 7638378 Method for forming semiconductor device
US Patent 7642111 Liquid crystal display device
US Patent 7642117 CMOS image sensor
US Patent 7642193 Method of treating a mask layer prior to performing an etching process
US Patent 7642658 Pad structure to prompt excellent bondability for low-k intermetal dielectric layers
US Patent 7645648 Liquid crystal display
US Patent 7649198 Nano-array and fabrication method thereof
US Patent 7652294 Semiconductor device and manufacturing method thereof
US Patent 7652369 Integrated circuit package and apparatus and method of producing an integrated circuit package
US Patent 7656042 Stratified underfill in an IC package
US Patent 7659207 Epitaxially coated silicon wafer and method for producing epitaxially coated silicon wafer
US Patent 7659208 Method for forming high density patterns
US Patent 7659561 Methods of fabricating semiconductor devices and structures thereof
US Patent 7659566 Method of fabricating a resistance based memory device and the memory device
US Patent 7662680 Method of producing a semiconductor element in a substrate and a semiconductor element
US Patent 7663147 Display apparatus and fabricating method thereof
US Patent 7674689 Method of making an integrated circuit including singulating a semiconductor wafer
US Patent 7678652 MOSFET-type semiconductor device, and method of manufacturing the same
US Patent 7678668 Manufacturing method of SOI substrate and manufacturing method of semiconductor device
US Patent 7678705 Plasma semiconductor processing system and method
US Patent 7679121 Ultra scalable high speed heterojunction vertical n-channel MISFETs and methods thereof
US Patent 7682862 Image sensor and method for manufacturing the same
US Patent 7683450 Method for producing smooth, dense optical films
US Patent 7691683 Electrode structures and method to form electrode structures that minimize electrode work function variation
US Patent 7691747 Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures
US Patent 7692185 Organic thin film transistor, flat panel display apparatus comprising the same, and method of manufacturing the organic thin film transistor
US Patent 7692217 Matched analog CMOS transistors with extension wells
US Patent 7692313 Substrate and semiconductor package for lessening warpage
US Patent 7695996 Photodetecting device
US Patent 7696618 POP (package-on-package) semiconductor device
US Patent 7700459 Method for producing electronic device and electronic device
US Patent 7700499 Multilayer silicon nitride deposition for a semiconductor device
US Patent 7701006 Method of producing a low-voltage power supply in a power integrated circuit
US Patent 7704773 MEMS devices having support structures with substantially vertical sidewalls and methods for fabricating the same
US Patent 7705395 Flash memory cell and method of manufacturing the same and programming/erasing reading method of flash memory cell
US Patent 7709328 Semiconductor device and method for fabricating same
US Patent 7709399 Atomic layer deposition systems and methods including metal β-diketiminate compounds
US Patent 7709891 Component arrangement including a power semiconductor component having a drift control zone
US Patent 7718501 Method for the production of MOS transistors
US Patent 7719045 Capacitor for a semiconductor device and method of forming the same
US Patent 7723243 Multi-layered structure forming method, method of manufacturing wiring substrate, and method of manufacturing electronic apparatus
US Patent 7723734 LTPS-LCD structure and method for manufacturing the same
US Patent 7723826 Semiconductor wafer, semiconductor chip cut from the semiconductor wafer, and method of manufacturing semiconductor wafer
US Patent 7727911 Method for forming a gate insulating film
US Patent 7728334 Semiconductor device and manufacturing method thereof
US Patent 7732278 Split gate memory cell and method therefor
US Patent 7732316 Method for manufacturing a semiconductor device
US Patent 7732839 Semiconductor device and method for fabricating the same
US Patent 7741160 Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate
US Patent 7745269 Semiconductor device and manufacture method thereof
US Patent 7749782 Laser roughening to improve LED emissions
US Patent 7750438 Semiconductor device
US Patent 7754530 Thermal enhanced low profile package structure and method for fabricating the same
US Patent 7755088 Liquid crystal display
US Patent 7759156 Image sensor and method for manufacturing the same
US Patent 7759713 Ferroelectric tunneling element and memory applications which utilize the tunneling element
US Patent 7767546 Low cost fabrication of double box back gate silicon-on-insulator wafers with built-in shallow trench isolation in back gate layer
US Patent 7768127 Semiconductor device including multi-layered interconnection and method of manufacturing the device
US Patent 7768134 Interconnect structure and method for semiconductor device
US Patent 7781781 CMOS imager array with recessed dielectric
US Patent 7781815 Thin-film element, display device and memory cell using the thin-film element, and their fabrication methods
US Patent 7785929 Mountable integrated circuit package system with exposed external interconnects
US Patent 7785988 Processes for forming backplanes for electro-optic displays
US Patent 7786576 Semiconductor device, method of manufacturing semiconductor device, and electronic apparatus
US Patent 7791071 Profiling solid state samples
US Patent 7795069 Image sensor and method for manufacturing the same
US Patent 7795091 Method of forming a split gate memory device and apparatus
US Patent 7799584 Attaching device and method of fabricating organic light emmiting device using the same
US Patent 7799618 Method of manufacturing semiconductor device, semiconductor device, display device, and electronic instrument
US Patent 7799634 Method of forming nanocrystals
US Patent 7799677 Device comprising multi-layered thin film having excellent adhesive strength and method for fabricating the same
US Patent 7800098 Array substrate for liquid crystal display device and method of fabricating the same
US Patent 7800152 Methods for manufacturing a finfet using a conventional wafer and apparatus manufactured therefrom
US Patent 7803695 Semiconductor substrate and process for producing it
US Patent 7804146 Semiconductor device and method for fabricating the same
US Patent 7807492 Magnetoresistive random access memory with improved layout design and process thereof
US Patent 7807501 Integrated circuit package and apparatus and method of producing an integrated circuit package
US Patent 7808051 Standard cell without OD space effect in Y-direction
US Patent 7812404 Nonvolatile memory cell comprising a diode and a resistance-switching material
US Patent 7812456 Semiconductor device and a method of manufacturing the same
US Patent RE41889 Process for manufacturing high-sensitivity accelerometric and gyroscopic integrated sensors, and sensor thus produced
US Patent 7821141 Semiconductor device
US Patent 7825028 Method of manufacturing semiconductor device
US Patent 7825401 Strained layers within semiconductor buffer structures
US Patent 7825413 Liquid crystal display device and method of fabricating the same
US Patent 7825439 Semiconductor memory
US Patent 7829358 System and method for emitter layer shaping
US Patent 7833862 Semiconductor device and method for forming same
US Patent 7838877 Information recording and reproducing apparatus
US Patent 7842975 Dynamic array architecture
US Patent 7846769 Stratified underfill method for an IC package
US Patent 7846850 Method of fabricating insulation layer and method of fabricating semiconductor device using the same
US Patent 7851242 Monolithic white and full-color light emitting diodes using optically pumped multiple quantum wells
US Patent 7851354 Semiconductor memory device having local etch stopper and method of manufacturing the same
US Patent 7858419 Gallium nitride-based compound semiconductor multilayer structure and production method thereof
US Patent 7858487 Method and apparatus for indicating directionality in integrated circuit manufacturing
US Patent 7858976 Method of making an organic light emitting device
US Patent 7859020 Nitride semiconductor device, Doherty amplifier and drain voltage controlled amplifier
US Patent 7859120 Package system incorporating a flip-chip assembly
US Patent 7859121 Wiring board and method of manufacturing the same, and electronic component device using the wiring board and method of manufacturing the same
US Patent 7863096 Embedded die package and process flow using a pre-molded carrier
US Patent 7863627 Display device and electronic device provided with the same
US Patent 7863664 Semiconductor device and method for manufacturing the same
US Patent 7867852 Super-self-aligned trench-dmos structure and method
US Patent 7868325 Semiconductor wafer of single crystalline silicon and process for its manufacture
US Patent 7868369 Localized masking for semiconductor structure development
US Patent 7868376 Semiconductor storage device and method for manufacturing the same
US Patent 7880181 Light emitting diode with improved current spreading performance
US Patent 7880203 Semiconductor device, electro-optical device, electronic apparatus, method for manufacturing semiconductor device, method for manufacturing electro-optical device, and method for manufacturing electronic apparatus
US Patent 7880207 Photo detector device
US Patent 7880221 Forming metal-semiconductor films having different thicknesses within different regions of an electronic device
US Patent 7880302 Semiconductor device having metal wirings of laminated structure
US Patent 7880316 Dicing die-bonding film and process for producing semiconductor device
US Patent 7883948 Method and structure for reducing induced mechanical stresses
US Patent 7897482 Semiconductor device and manufacturing method thereof
US Patent 7898086 Semiconductor device having a package base with at least one through electrode
US Patent 7906782 Liquid crystal display device
US Patent 7906801 Semiconductor device and associated layouts having transistors formed from six linear conductive segments with intervening diffusion contact restrictions
US Patent 7910401 Organic thin film transistor, flat panel display apparatus comprising the same, and method of manufacturing the organic thin film transistor
US Patent 7910958 Semiconductor device and associated layouts having transistors formed from linear conductive segment with non-active neighboring linear conductive segment
US Patent 7910959 Semiconductor device and associated layouts having transistors formed from six linear conductive segments with gate electrode connection through single interconnect level
US Patent 7910984 Semiconductor device and method for manufacturing same
US Patent 7915066 Methods of making electromechanical three-trace junction devices
US Patent 7919403 Method of manufacturing silicon carbide semiconductor device
US Patent 7919817 Electrostatic discharge (ESD) protection applying high voltage lightly doped drain (LDD) CMOS technologies
US Patent 7923733 Semiconductor device
US Patent 7923757 Semiconductor device and associated layouts having linear shaped gate electrodes defined along at least five adjacent gate electrode tracks of equal pitch with gate electrode connection through single interconnect level
US Patent 7923794 Micromechanical component having thin-layer encapsulation and production method
US Patent 7923842 GaAs integrated circuit device and method of attaching same
US Patent 7923846 Integrated circuit package-in-package system with wire-in-film encapsulant
US Patent 7927906 Method for MEMS threshold sensor packaging
US Patent 7932544 Semiconductor device and associated layouts including linear conductive segments having non-gate extension portions
US Patent 7932545 Semiconductor device and associated layouts including gate electrode level region having arrangement of six linear conductive segments with side-to-side spacing less than 360 nanometers
US Patent 7932589 Semiconductor device and method for manufacturing the same
US Patent 7935587 Advanced forming method and structure of local mechanical strained transistor
US Patent 7939439 Semiconductor device and fabricating method thereof
US Patent 7939455 Method for forming strained silicon nitride films and a device containing such films
US Patent 7943420 Single mask adder phase change memory element
US Patent 7943461 High-voltage semiconductor device and method for manufacturing the same
US Patent 7943951 Light emitting device package
US Patent 7943966 Integrated circuit and associated layout with gate electrode level portion including at least two complimentary transistor forming linear conductive segments and at least one non-gate linear conductive segment
US Patent 7943967 Semiconductor device and associated layouts including diffusion contact placement restriction based on relation to linear conductive segments
US Patent 7948012 Semiconductor device having 1965 nm gate electrode level region including at least four active linear conductive segments and at least one non-gate linear conductive segment
US Patent 7948013 Semiconductor device and associated layouts having linear shaped gate electrodes defined along at least five adjacent gate electrode tracks of equal pitch
US Patent 7952091 Organic thin film transistor and method of manufacturing the same
US Patent 7952119 Semiconductor device and associated layout having three or more linear-shaped gate electrode level conductive segments of both equal length and equal pitch
US Patent 7955947 Method of forming isolation structure for semiconductor integrated circuit substrate
US Patent 7956381 Multi-layered integrated circuit and apparatus with thermal management and method
US Patent 7956455 RF power transistor package
US Patent 7960219 Thin-film transistor substrate and method of fabricating the same
US Patent 7960720 Transistor, transistor circuit, electrooptical device and electronic apparatus
US Patent 7960829 Support structure for use in thinning semiconductor substrates and for supporting thinned semiconductor substrates
US Patent 7960844 3-dimensional flash memory device, method of fabrication and method of operation
US Patent 7964871 Thin-film transistor and thin-film diode having amorphous-oxide semiconductor layer
US Patent 7968358 Digital radiographic flat-panel imaging array with dual height semiconductor and method of making same
US Patent 7968398 Method for producing a floating gate with an alternation of lines of first and second materials
US Patent 7968416 Integrated circuit arrangement with NPN and PNP bipolar transistors and corresponding production method
US Patent 7968448 Semiconductor device and manufacturing method thereof
US Patent 7973395 Semiconductor device using lead frame
US Patent 7977760 Photoelectric conversion device, its manufacturing method, and image pickup device
US Patent 7982317 Semiconductor device, semiconductor device module, and method for manufacturing the semiconductor device module
US Patent 7985623 Integrated circuit package system with contoured encapsulation
US Patent 7989241 Method for making liquid crystal display screen
US Patent 7989360 Semiconductor processing methods, and methods for forming silicon dioxide
US Patent 7989847 Semiconductor device having linear-shaped gate electrodes of different transistor types with uniformity extending portions of different lengths
US Patent 7989848 Semiconductor device having at least four side-by-side electrodes of equal length and equal pitch with at least two transistor connections to power or ground
US Patent 7989918 Implementing tamper evident and resistant detection through modulation of capacitance
US Patent 7989942 IC package with capacitors disposed on an interposal layer
US Patent 7993938 Highly doped III-nitride semiconductors
US Patent 7994519 Semiconductor chip and method for producing a semiconductor chip
US Patent 7994526 Light emitting diode package and light emitting diode system having at least two heat sinks
US Patent 7999249 Nitride semiconductor light emitting device with surface texture and its manufacture
US Patent 7999379 Microelectronic assemblies having compliancy
US Patent 8003541 Methods of forming variable resistance memory cells, and methods of etching germanium, antimony, and tellurium-comprising materials
US Patent 8012789 Nonvolatile memory device and method of manufacturing the same
Edits on 13 Dec, 2021
Golden AI
edited on 13 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8012789 Nonvolatile memory device and method of manufacturing the same
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003541 Methods of forming variable resistance memory cells, and methods of etching germanium, antimony, and tellurium-comprising materials
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7999379 Microelectronic assemblies having compliancy
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7999249 Nitride semiconductor light emitting device with surface texture and its manufacture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7994526 Light emitting diode package and light emitting diode system having at least two heat sinks
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7994519 Semiconductor chip and method for producing a semiconductor chip
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7993938 Highly doped III-nitride semiconductors
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7989942 IC package with capacitors disposed on an interposal layer
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7989918 Implementing tamper evident and resistant detection through modulation of capacitance
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7989848 Semiconductor device having at least four side-by-side electrodes of equal length and equal pitch with at least two transistor connections to power or ground
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7989847 Semiconductor device having linear-shaped gate electrodes of different transistor types with uniformity extending portions of different lengths
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7989360 Semiconductor processing methods, and methods for forming silicon dioxide
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7989241 Method for making liquid crystal display screen
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7985623 Integrated circuit package system with contoured encapsulation
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7982317 Semiconductor device, semiconductor device module, and method for manufacturing the semiconductor device module
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7977760 Photoelectric conversion device, its manufacturing method, and image pickup device
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7973395 Semiconductor device using lead frame
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7968448 Semiconductor device and manufacturing method thereof
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7968416 Integrated circuit arrangement with NPN and PNP bipolar transistors and corresponding production method
Load more
Find more people like Quoc D Hoang
Use the Golden Query Tool to discover related individuals, professionals, or experts with similar interests, expertise, or connections in the Knowledge Graph.
Open Query Tool
Access by API
Company
Home
Press & Media
Blog
Careers
WE'RE HIRING
Products
Knowledge Graph
Query Tool
Data Requests
Knowledge Storage
API
Pricing
Enterprise
ChatGPT Plugin
Legal
Terms of Service
Enterprise Terms of Service
Privacy Policy
Help
Help center
API Documentation
Contact Us
By using this site, you agree to our
Terms of Service
.
SUBSCRIBE