Patent attributes
A semiconductor device having package-on-package (POP) configuration, primarily comprises a plurality of vertically stacked semiconductor packages and a plurality of electrical connecting components such as solder paste to electrically connect the external terminals of the semiconductor packages such as external leads of leadframes. Each semiconductor package has an encapsulant to encapsulate at least a chip where the encapsulant is movable with respect to the electrical connecting components to absorb the stresses between the vertically stacked semiconductor packages. In one embodiment, a stress-releasing layer is interposed between the vertically stacked semiconductor packages.