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Trong Phan

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Patent primary examiner of
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US Patent 7088604 Multi-bank memory
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US Patent 7088619 Method for programming and erasing an NROM cell
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US Patent 7092283 Magnetic random access memory devices including heat generating layers and related methods
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US Patent 7113417 Integrated memory circuit
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US Patent 7120062 Method for soft-programming an electrically erasable nonvolatile memory device, and an electrically erasable nonvolatile memory device implementing the soft-programming method
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US Patent 7130206 Content addressable memory cell including resistive memory elements
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US Patent 7142442 Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testability
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US Patent 7145790 Phase change resistor cell and nonvolatile memory device using the same
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US Patent 7145792 Semiconductor integrated circuit device
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US Patent 7151690 6F
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US Patent 7151699 Semiconductor memory device
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US Patent 7164598 Methods of operating magnetic random access memory device using spin injection and related devices
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US Patent 7167394 Sense amplifier for reading a cell of a non-volatile memory device
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US Patent 7170782 Method and structure for efficient data verification operation for non-volatile memories
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US Patent 7173871 Semiconductor memory device and method of outputting data strobe signal thereof
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US Patent 7173875 SRAM array with improved cell stability
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US Patent 7177175 Low power programming technique for a floating body memory transistor, memory cell, and memory array
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US Patent 7177206 Power supply circuit for delay locked loop and its method
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US Patent 7177229 Apparatus for tuning a RAS active time in a memory device
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US Patent 7180808 Semiconductor memory device for performing refresh operation
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US Patent 7184298 Low power programming technique for a floating body memory transistor, memory cell, and memory array
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US Patent 7184326 Semiconductor memory
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US Patent 7184357 Decoding circuit for memory device
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US Patent 7190615 Semiconductor device
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US Patent 7193918 Process for refreshing a dynamic random access memory and corresponding device
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US Patent 7193922 Semiconductor integrated circuit
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US Patent 7196922 Programmable priority encoder
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US Patent 7196965 Over driving control signal generator in semiconductor memory device
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US Patent 7199740 Method and apparatus for use in switched capacitor systems
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US Patent 7218555 Imaging cell that has a long integration period and method of operating the imaging cell
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US Patent 7248513 Semiconductor memory device having memory block configuration
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US Patent 7248535 Semiconductor memory devices having negatively biased sub word line scheme and methods of driving the same
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US Patent 7251160 Non-volatile memory and method with power-saving read and program-verify operations
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US Patent 7251178 Current sense amplifier
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US Patent 7254049 Method of comparison between cache and data register for non-volatile memory
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US Patent 7254062 Circuit for selecting/deselecting a bitline of a non-volatile memory
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US Patent 7254073 Memory device having an array of resistive memory cells
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US Patent 7257028 Temperature compensated bit-line precharge
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US Patent 7259990 Semiconductor memory device
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US Patent 7262983 Semiconductor memory
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US Patent 7266021 Latch-based random access memory (LBRAM) tri-state banking architecture
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US Patent 7269065 Nonvolatile semiconductor storage apparatus and readout method
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US Patent 7272045 Method for programming and erasing an NROM cell
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US Patent 7277306 Associative memory capable of searching for data while keeping high data reliability
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US Patent 7277307 Column defect detection in a content addressable memory
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US Patent 7277312 Integrated semiconductor memory with an arrangement of nonvolatile memory cells, and method
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US Patent 7277321 Method for programming and erasing an NROM cell
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US Patent 7277339 Semiconductor storage device precharging/discharging bit line to read data from memory cell
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US Patent 7277355 Method and apparatus for generating temperature-compensated read and verify operations in flash memories
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US Patent 7286380 Reconfigurable memory block redundancy to repair defective input/output lines
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US Patent 7286382 Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testability
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US Patent 7286426 Semiconductor memory device
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US Patent 7289353 Systems and methods for adjusting programming thresholds of polymer memory cells
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US Patent 7289361 Semiconductor integrated circuit and nonvolatile memory element
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US Patent 7292496 Semiconductor memory circuit
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US Patent 7295457 Integrated circuit chip with improved array stability
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US Patent 7301793 Semiconductor memory device
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US Patent 7307907 SRAM device and a method of operating the same to reduce leakage current during a sleep mode
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US Patent 7313021 Nonvolatile memory circuit
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US Patent 7317631 Method for reading Uniform Channel Program (UCP) flash memory cells
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US Patent 7317632 Non-volatile memory storage device and controller therefor
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US Patent 7319619 Programmable logic device memory blocks with adjustable timing
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US Patent 7330387 Integrated semiconductor memory device
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US Patent 7336521 Memory pumping circuit
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US Patent 7336550 Semiconductor memory device with reduced multi-row address testing
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US Patent RE40147 Memory card device including a clock generator
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US Patent 7352626 Voltage regulator with less overshoot and faster settling time
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US Patent 7355911 Semiconductor memory component and method for testing semiconductor memory components having a restricted memory area (partial good memories)
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US Patent 7355918 Semiconductor memory device and refresh method thereof
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US Patent 7359267 Method of transferring data
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US Patent 7362631 Semiconductor memory device capable of controlling drivability of overdriver
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US Patent 7362643 Semiconductor-memory device and bank refresh method
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US Patent 7366031 Memory arrangement and method for addressing a memory
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US Patent 7369428 Methods of operating a magnetic random access memory device and related devices and structures
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US Patent 7375999 Low equalized sense-amp for twin cell DRAMs
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US Patent 7376006 Enhanced programming performance in a nonvolatile memory device having a bipolar programmable storage element
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US Patent 7376035 Semiconductor memory device for performing refresh operation and refresh method thereof
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US Patent 7379330 Retargetable memory cell redundancy methods
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US Patent 7379367 Memory controller and semiconductor comprising the same
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US Patent 7382638 Matchline sense circuit and method
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US Patent 7382666 Power supply circuit for delay locked loop and its method
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US Patent 7382675 Semiconductor memory device
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US Patent 7391648 Low voltage sense amplifier for operation under a reduced bit line bias voltage
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US Patent 7394691 Semiconductor memory device which prevents destruction of data
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US Patent 7397687 Ferroelectric memory device having ferroelectric capacitor
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US Patent 7403412 Integrated circuit chip with improved array stability
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US Patent 7403446 Single late-write for standard synchronous SRAMs
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US Patent 7408813 Block erase for volatile memory
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US Patent 7417882 Content addressable memory device
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US Patent 7423899 SRAM device having forward body bias control
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US Patent 7426154 Sensor adjusting circuit
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US Patent 7428164 Semiconductor memory device
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US Patent 7428167 Semiconductor integrated circuit and nonvolatile memory element
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US Patent 7433230 Nonvolatile semiconductor memory device having assist gate
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US Patent 7436712 Nonvolatile memory device including circuit formed of thin film transistors
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US Patent 7440320 Row decoder for preventing leakage current and semiconductor memory device including the same
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US Patent 7447066 Memory with retargetable memory cell redundancy
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US Patent 7453724 Flash memory device having improved program rate
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US Patent 7460388 Semiconductor memory device
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US Patent 7460389 Write operations for phase-change-material memory
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US Patent 7471560 Electronic device including a memory array and conductive lines
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US Patent 7480192 Pull-up voltage circuit
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US Patent 7489534 Semiconductor package for forming a double die package (DDP)
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US Patent 7492653 Semiconductor memory device capable of effectively testing failure of data
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US Patent 7495986 Semiconductor memory device, and method of controlling the same
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US Patent 7499303 Binary and ternary non-volatile CAM
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US Patent 7505318 Nonvolatile semiconductor memory device
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US Patent 7518901 Ferroelectric semiconductor memory device and method for reading the same
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US Patent 7525827 Stored don't-care based hierarchical search-line scheme
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US Patent 7529133 Nonvolatile semiconductor storage apparatus and readout method
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US Patent 7532534 Voltage generating circuit and semiconductor memory device having the same
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US Patent 7539072 Semiconductor memory device
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US Patent 7542325 Ferroelectric memory
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US Patent 7542368 Semiconductor memory device
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US Patent 7545701 Circuit and method of driving sub-word lines of a semiconductor memory device
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US Patent 7551501 Semiconductor memory device with temperature sensing device and operation thereof
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US Patent 7558101 Scan sensing method that improves sensing margins
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US Patent 7577046 Circuit and method for generating column path control signals in semiconductor device
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US Patent 7580286 Selective threshold voltage verification and compaction
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US Patent 7613024 Local digit line architecture and method for memory devices having multi-bit or low capacitance memory cells
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US Patent 7619940 Apparatus and method of generating power up signal of semiconductor integrated circuit
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US Patent 7646638 Non-volatile memory cell that inhibits over-erasure and related method and memory array
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US Patent 7656705 Fast single phase program algorithm for quadbit
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US Patent 7668009 Method of decreasing program disturb in memory cells
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US Patent 7688661 Semiconductor memory device, and method of controlling the same
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US Patent 7692949 Multi-bit resistive memory
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US Patent 7697317 Nonvolatile semiconductor memory device
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US Patent 7697333 NAND flash memory
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US Patent 7701762 NAND memory device and programming methods
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US Patent 7715224 MRAM with enhanced programming margin
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US Patent 7729155 High speed, low power, low leakage read only memory
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US Patent 7729184 Memory device having function of detecting bit line sense amp mismatch
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US Patent 7733696 Non-volatile memory devices including local control gates on multiple isolated well regions and related methods and systems
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US Patent 7733700 Method and structures for highly efficient hot carrier injection programming for non-volatile memories
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US Patent 7733723 Semiconductor memory device having precharge signal generator and its driving method
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US Patent 7738299 Erase discharge control method of nonvolatile semiconductor memory device
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US Patent 7746716 Memory having a dummy bitline for timing control
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US Patent 7760532 Multi-bank memory
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US Patent 7773402 Semiconductor memory apparatus
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US Patent 7778105 Memory with write port configured for double pump write
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US Patent 7787281 Writing circuit for a phase change memory
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US Patent 7787284 Integrated circuit chip with improved array stability
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US Patent 7796458 Selectively-powered memories
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US Patent 7808820 Parallel programming of multiple-bit-per-cell memory cells by controlling program pulsewidth and programming voltage
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US Patent 7813211 Semiconductor memory device
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US Patent 7821829 Nonvolatile memory device including circuit formed of thin film transistors
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US Patent 7821831 Block erase for volatile memory
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US Patent 7830695 Capacitive arrangement for qubit operations
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US Patent 7830697 High forward current diodes for reverse write 3D cell
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US Patent 7835181 Semiconductor memory device
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US Patent 7839714 Non-volatile semiconductor storage device and word line drive method
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US Patent 7848141 Multi-level cell copyback program method in a non-volatile memory device
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US Patent 7855909 Calibrating page borders in a phase-change memory
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US Patent 7855926 Semiconductor memory device having local sense amplifier with on/off control
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US Patent 7869247 Bit line decoder architecture for NOR-type memory array
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US Patent 7869253 Method of determining a memory state of a resistive memory cell and device measuring the memory state of a resistive memory cell
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US Patent 7869256 Bi-directional resistive random access memory capable of multi-decoding and method of writing data thereto
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US Patent 7869257 Integrated circuit including diode memory cells
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US Patent 7876636 Semiconductor memory device and method for driving the same
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US Patent 7885116 Sense amplifier for low-supply-voltage nonvolatile memory cells
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US Patent 7889536 Integrated circuit including quench devices
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US Patent 7898883 Method for controlling access of a memory
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US Patent 7903443 Butterfly match-line structure and search method implemented thereby
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US Patent 7903447 Method, apparatus and computer program product for read before programming process on programmable resistive memory cell
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US Patent 7903487 Semiconductor memory device, and method of controlling the same
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US Patent 7907435 Semiconductor device
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US Patent 7907462 Core voltage discharger and semiconductor memory device with the same
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US Patent 7911836 Data restoration in case of page-programming failure
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US Patent 7916513 Non-destructive read back for ferroelectric data storage device
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US Patent 7924617 Selective threshold voltage verification and compaction
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US Patent 7936604 High speed operation method for twin MONOS metal bit array
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US Patent 7940543 Low power synchronous memory command address scheme
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US Patent 7944744 Estimating values related to discharge of charge-storing memory cells
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US Patent 7948786 Rank select using a global select pin
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US Patent 7957171 Associative memory and searching system using the same
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US Patent 7957185 Non-volatile memory and method with power-saving read and program-verify operations
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US Patent 7957186 Non-volatile memory system and data read method of non-volatile memory system
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US Patent 7961512 Adaptive algorithm in cache operation with dynamic data latch requirements
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US Patent 7969795 Negative voltage generator for use in semiconductor memory device
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US Patent 7974127 Operation methods for memory cell and array for reducing punch through leakage
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US Patent 7983069 Write operations for phase-change-material memory
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US Patent 7986553 Programming of a solid state memory utilizing analog communication of bit patterns
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US Patent 7986554 Different combinations of wordline order and look-ahead read to improve non-volatile memory performance
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US Patent 7986555 Method for programming and erasing an NROM cell
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US Patent 7995365 Method and apparatuses for managing double data rate in non-volatile memory
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US Patent 7995417 Semiconductor memory circuit
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US Patent 8009474 Semiconductor storage device and read voltage correction method
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US Patent 8009485 Semiconductor memory device
Edits on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
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US Patent 8009485 Semiconductor memory device
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Golden AI
edited on 8 Dec, 2021
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US Patent 8009474 Semiconductor storage device and read voltage correction method
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7995417 Semiconductor memory circuit
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7995365 Method and apparatuses for managing double data rate in non-volatile memory
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7986553 Programming of a solid state memory utilizing analog communication of bit patterns
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7986555 Method for programming and erasing an NROM cell
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Golden AI
edited on 8 Dec, 2021
Edits on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7983069 Write operations for phase-change-material memory
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7974127 Operation methods for memory cell and array for reducing punch through leakage
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Golden AI
edited on 8 Dec, 2021
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Patent primary examiner of
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US Patent 7969795 Negative voltage generator for use in semiconductor memory device
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Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
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US Patent 7961512 Adaptive algorithm in cache operation with dynamic data latch requirements
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Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
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US Patent 7957185 Non-volatile memory and method with power-saving read and program-verify operations
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Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
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US Patent 7957186 Non-volatile memory system and data read method of non-volatile memory system
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Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
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US Patent 7957171 Associative memory and searching system using the same
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Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
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US Patent 7948786 Rank select using a global select pin
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Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
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US Patent 7944744 Estimating values related to discharge of charge-storing memory cells
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Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
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US Patent 7940543 Low power synchronous memory command address scheme

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