US Patent 7539072 Semiconductor memory device

A semiconductor memory device generates an internal voltage by using one detecting circuit at the burn-in and normal modes. The semiconductor memory device includes a burn-in adjusting circuit to produce a burn-in mode test signal, a first reference voltage generating circuit to produce a first reference voltage for a burn-in test in response to the burn-in mode test signal, a second reference voltage generating circuit to produce a second reference voltage for a normal mode, a detecting circuit for detecting voltage levels of the first and second reference voltages and outputting a detection signal and an internal voltage generating circuit for generating an internal voltage in response to the detection signal.