US Patent 7375999 Low equalized sense-amp for twin cell DRAMs

Embodiments of the invention provide a method and apparatus for accessing a twin cell memory device. In one embodiment, a twin memory cell is accessed using a first bitline and a second bitline. The method includes precharging the first bitline and the second bitline to a low voltage. A wordline voltage is asserted to access the twin memory cell. A voltage difference between the first and second bitline is created by a data value and a complement of the data value stored in the twin memory cell, and the voltage difference is sensed.