US Patent 10535733 Method of forming a nanosheet transistor

Patent

US Patent 12136671 Gate-all-around field-effect transistor having source side lateral end portion smaller than a thickness of channel portion and drain side lateral end portion

US Patent 11450738 Source/drain regions in integrated circuit structures

US Patent 11923361 Semiconductor device with isolation structure

US Patent 11929425 Nanowire stack GAA device with inner spacer

US Patent 11942513 Semiconductor structure and method of fabricating the semiconductor structure

US Patent 11996459 Counteracting semiconductor material loss during semiconductor structure formation

US Patent 12069856 Methods of forming electronic devices using materials removable at different temperatures

US Patent 11476268 Methods of forming electronic devices using materials removable at different temperatures

US Patent 11239359 Fabricating a gate-all-around (GAA) field effect transistor having threshold voltage asymmetry by thinning source side lateral end portion of the nanosheet layer

US Patent 10930498 Methods for producing nanowire stack GAA device with inner spacer

United States Patent and Trademark Office

Andy Huynh