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US Patent 11450738 Source/drain regions in integrated circuit structures

Patent 11450738 was granted and assigned to Intel on September, 2022 by the United States Patent and Trademark Office.

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Is a
Patent
Patent
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Patent attributes

Patent Applicant
Intel
Intel
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Current Assignee
Intel
Intel
0
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
0
Patent Number
114507380
Patent Inventor Names
Anand S. Murthy0
Biswajeet Guha0
Glenn A. Glass0
Sean T. Ma0
Date of Patent
September 20, 2022
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Patent Application Number
168324170
Date Filed
March 27, 2020
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Patent Citations
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US Patent 10535733 Method of forming a nanosheet transistor
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US Patent 11038044 Semiconductor device and manufacturing method thereof
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US Patent 11276576 Gate metal patterning to avoid gate stack attack due to excessive wet etching
0
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US Patent 10804165 Source and drain isolation for CMOS nanosheet with one block mask
Patent Primary Examiner
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Ali Naraghi
0

Disclosed herein are source/drain regions in integrated circuit (IC) structures, as well as related methods and components. For example, in some embodiments, an IC structure may include: a channel region including a first semiconductor wire and a second semiconductor wire; and a source/drain region proximate to the channel region, wherein the source/drain region includes a first semiconductor portion proximate to an end of the first semiconductor wire, the source/drain region includes a second semiconductor portion proximate to an end of the second semiconductor wire, and the source/drain region includes a contact metal at least partially between the first semiconductor portion and the second semiconductor portion.

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