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US Patent 11476268 Methods of forming electronic devices using materials removable at different temperatures

Patent 11476268 was granted and assigned to Micron Technology on October, 2022 by the United States Patent and Trademark Office.

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Is a
Patent
Patent
0

Patent attributes

Patent Applicant
Micron Technology
Micron Technology
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Current Assignee
Micron Technology
Micron Technology
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
114762680
Patent Inventor Names
Kunal Shrotri0
Chandra S. Tiwari0
Date of Patent
October 18, 2022
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Patent Application Number
168871780
Date Filed
May 29, 2020
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Patent Citations
‌
US Patent 10468259 Charge-trap layer separation and word-line isolation in a 3-D NAND structure
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US Patent 10535733 Method of forming a nanosheet transistor
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US Patent 10553498 Integrated circuit with replacement gate stacks and method of forming same
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US Patent 10553439 Multiple nanosecond laser pulse anneal processes and resultant semiconductor structure
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US Patent 10014292 3D semiconductor device and structure
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US Patent 10115723 Complementary metal oxide semiconductor (CMOS) devices employing plasma-doped source/drain structures and related methods
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US Patent 10147634 Techniques for trench isolation using flowable dielectric materials
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US Patent 10325912 Semiconductor structure cutting process and structures formed thereby
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...
Patent Primary Examiner
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Allison Bernstein
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CPC Code
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H01L 27/11582
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H01L 27/11585
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H01L 27/11519
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H01L 27/11556
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A method comprising forming a stack precursor comprising alternating first materials and second materials, the first materials and the second materials exhibit different melting points. A portion of the alternating first materials and second materials is removed to form a pillar opening through the alternating first materials and second materials. A sacrificial material is formed in the pillar opening. The first materials are removed to form first spaces between the second materials, the first materials formulated to be in a liquid phase or in a gas phase at a first removal temperature. A conductive material is formed in the first spaces. The second materials are removed to form second spaces between the conductive materials, the second materials formulated to be in a liquid phase or in a gas phase at a second removal temperature. A dielectric material is formed in the second spaces. The sacrificial material is removed from the pillar opening and cell materials are formed in the pillar opening.

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