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US Patent 11699760 Contact structure for stacked multi-gate device

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Is a
Patent
Patent
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Patent attributes

Patent Applicant
Taiwan Semiconductor Manufacturing Company
Taiwan Semiconductor Manufacturing Company
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Current Assignee
Taiwan Semiconductor Manufacturing Company
Taiwan Semiconductor Manufacturing Company
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
116997600
Date of Patent
July 11, 2023
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Patent Application Number
171405320
Date Filed
January 4, 2021
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Patent Citations
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US Patent 10199502 Structure of S/D contact and method of making same
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US Patent 10256158 Insulated epitaxial structures in nanosheet complementary field effect transistors
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US Patent 10290546 Threshold voltage adjustment for a gate-all-around semiconductor structure
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US Patent 10475902 Spacers for nanowire-based integrated circuit device and method of fabricating same
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US Patent 11177258 Stacked nanosheet CFET with gate all around structure
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US Patent 11069684 Stacked field effect transistors with reduced coupling effect
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US Patent 9818872 Multi-gate device and method of fabrication thereof
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US Patent 10032627 Method for forming stacked nanowire transistors
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...
Patent Primary Examiner
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Earl N Taylor
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CPC Code
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H01L 29/41733
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H01L 29/42392
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H01L 29/66439
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H01L 29/66545
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H01L 29/78696
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H01L 29/7855
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H01L 27/0922
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H01L 21/823418
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...

A semiconductor device according to the present disclosure includes a stack of first channel members, a stack of second channel members disposed directly over the stack of first channel members, a bottom source/drain feature in contact with the stack of the first channel members, a separation layer disposed over the bottom source/drain feature, a top source/drain feature in contact with the stack of second channel members and disposed over the separation layer, and a frontside contact that extends through the top source/drain feature and the separation layer to be electrically coupled to the bottom source/drain feature.

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