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H01L 21/823418

MIS technology {, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures}

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data.epo.org/linked-data/def/cpc/H01L21-823418
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Patent classification

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Child Classification
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H01L 21/823425
Classification Type
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Cooperative Patent Classification
Parent Classification
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H01L 21/8234
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