US Patent 10475902 Spacers for nanowire-based integrated circuit device and method of fabricating same

Nanowire-based integrated circuit devices and methods for fabricating such are disclosed herein. An exemplary method includes forming a heterostructure over a substrate. A gate structure is formed traversing the heterostructure, such that the gate structure separates a source region and a drain region of the heterostructure and defines a channel region between the source region and the drain region. A source/drain nanowire release process is performed on the heterostructure to release a nanowire in the source region and the drain region. Nanowire spacers are then formed in the source region and the drain region. The nanowire is disposed between the nanowire spacers. During a gate replacement process, a channel nanowire release process is performed on the heterostructure to release the nanowire in the channel region. Epitaxial source/drain features are formed over the nanowire and the nanowire spacers in the source region and the drain region before the gate replacement process.