Gowin Semiconductor Corp.

Gowin Semiconductor Corp. is semiconductor manufacturer headquartered in Guanghzou, China that develops programmable logic devices. The company's hardware solutions are designed to reduce the total cost of implementing field programmable gate arrays (FPGA) on production boards. Its offerings include a range of programmable logic devices, design software, intellectual property (IP) cores, reference designs, and development kits. The company was founded in 2014 by Jason Zhu and has design centers in California, Jinan (China), and Shanghai. Gowin serves customers in the following markets:

• AI and edge computing
• communication
• industrial
• automotive
• consumer
• medical
• LED display
• cloud computing and data centers

Gowin’s LittleBee product family offers flash-based, non-volatile FPGAs with logic resources, multiple IO standards, embedded RAM (random-access memory), DSPs (digital signal processors), PLLs (phase-locked loops), embedded security, and additional user flash memory. These products are optimized for low-power, low-cost, and small-footprint applications requiring instant-on, high input/output (I/O) count, high-throughput, and low-latency programmable computing.

LittleBee FPGAs are applied in intensive source-synchronous interfacing and bridging applications, such as MIPI CSI-2 (camera serial interface 2), MIPI DSI (display serial interface), USB 2.0 (universal serial bus 2.0), Ethernet, HDMI (high-definition multimedia interface), MIPI I3C, and more. They are also suitable for hardware management applications with instant-on booting and built-in security functions. The LittleBee FPGA product line is equipped with multiple sub-features, such as extended memory, hardened ARM Cortex-M processor cores, security, and Bluetooth LE (low energy), which together function to expand its capabilities and usage compared to traditional FPGA products.

In addition, Gowin provides FPGA development software for the LittleBee product family, including synthesis, mapping, placement, routing and bitstream generation along with programming tools, an embedded logic analyzer, and a power calculator.

Gowin’s Arora family of FPGA ICs aims to offer a balanced performance-to-cost ratio, making it suitable for compute-intensive consumer, industrial, automotive and test equipment applications. These mid-density SRAM (static random-access memory) based FPGAs offer optimized LUTs (lookup tables), DSPs, BSRAM (burst static RAM), serialized I/O for real-time SoC (system on chip), co-processing, and signal processing development. The Arora family is integrated with multiple product line sub-features, such as embedded PSRAM (pseudo-static RAM), DDR (double data rate), and flash memory.

Diagram illustrating how Gowin's ISP functions

The Gowin ISP IP core pipeline and AE/AWB co-processor take in pixel data from an image sensor in the form of a raw Bayer input stream and adjust it through a CFA (color filter array/debayer), CCM (color correction array), gamma correction, AE (auto exposure), and AWB (auto white balance) modules to correct the color and brightness of images for display or recognition purposes. Gowin’s ISP IP core portfolio can work together with video interface, scalar, and memory controller IPs in Gowin's IP core generator to function as a programmable SoC solution customized to the needs of a particular application and product.

Demonstration of Gowin's image signal processor (ISP)