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Junghwa M. Im
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Edits on 15 Dec, 2021
"Remove inverse infobox"
Golden AI
edited on 15 Dec, 2021
Edits made to:
Infobox
(
-18
properties)
Infobox
Patent primary examiner of
US Patent 7358616 Semiconductor stacked die/wafer configuration and packaging and method thereof
US Patent 7358618 Semiconductor device and manufacturing method thereof
US Patent 7361992 Semiconductor device including interconnects formed by damascene process and manufacturing method thereof
US Patent 7361993 Terminal pad structures and methods of fabricating same
US Patent 7372142 Vertical conduction power electronic device package and corresponding assembling method
US Patent 7374174 Small electrode for resistance variable devices
US Patent 7928462 Light emitting device having vertical structure, package thereof and method for manufacturing the same
US Patent 7939383 Method for fabricating semiconductor package free of substrate
US Patent 7956451 Packages for encapsulated semiconductor devices and method of making same
US Patent 7968371 Semiconductor package system with cavity substrate
US Patent 7968377 Integrated circuit protruding pad package system
US Patent 7968998 Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package
US Patent 7985627 Thermal intermediate apparatus, systems, and methods
US Patent 7989940 System and method for increasing the number of IO-s on a ball grid package by wire bond stacking of same size packages through apertures
US Patent 7994590 High dielectric constant insulators and associated fabrication methods
US Patent 7999369 Power electronic package having two substrates with multiple semiconductor chips and electronic components
US Patent 8003513 Multilayer circuit devices and manufacturing methods using electroplated sacrificial structures
US Patent 8004061 Conductive trace with reduced RF impedance resulting from the skin effect
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8004061 Conductive trace with reduced RF impedance resulting from the skin effect
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 8003513 Multilayer circuit devices and manufacturing methods using electroplated sacrificial structures
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7999369 Power electronic package having two substrates with multiple semiconductor chips and electronic components
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7994590 High dielectric constant insulators and associated fabrication methods
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7989940 System and method for increasing the number of IO-s on a ball grid package by wire bond stacking of same size packages through apertures
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7985627 Thermal intermediate apparatus, systems, and methods
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7968998 Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7968377 Integrated circuit protruding pad package system
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7968371 Semiconductor package system with cavity substrate
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7956451 Packages for encapsulated semiconductor devices and method of making same
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7939383 Method for fabricating semiconductor package free of substrate
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7928462 Light emitting device having vertical structure, package thereof and method for manufacturing the same
Edits on 29 Nov, 2021
Golden AI
edited on 29 Nov, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7374174 Small electrode for resistance variable devices
Edits on 26 Nov, 2021
Golden AI
edited on 26 Nov, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7372142 Vertical conduction power electronic device package and corresponding assembling method
Edits on 25 Nov, 2021
Golden AI
edited on 25 Nov, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7361993 Terminal pad structures and methods of fabricating same
Golden AI
edited on 25 Nov, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7361992 Semiconductor device including interconnects formed by damascene process and manufacturing method thereof
Golden AI
edited on 25 Nov, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7358618 Semiconductor device and manufacturing method thereof
Golden AI
edited on 25 Nov, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7358616 Semiconductor stacked die/wafer configuration and packaging and method thereof
"Created via: Entity Importer"
Golden AI
created this topic on 25 Nov, 2021
Edits made to:
Infobox
(
+2
properties)
Junghwa M. Im
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Current Employer
United States Patent and Trademark Office
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