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US Patent 8841765 Multi-chip module with stacked face-down connected dies

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
April 22, 2011
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Date of Patent
September 23, 2014
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Patent Application Number
13092376
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Patent Citations Received
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US Patent RE49987 Multiple plated via arrays of different wire heights on a same substrate
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US Patent 11854785 Package structure for heat dissipation
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US Patent 11929337 3D-interconnect
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US Patent 11990382 Fine pitch BVA using reconstituted wafer with area array accessible for testing
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Patent Inventor Names
Ilyas Mohammed
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Piyush Savalia
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Belgacem Haba
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
8841765
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Patent Primary Examiner
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S. V. Clark
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