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US Patent 7402897 Vertical system integration

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
August 8, 2003
Date of Patent
July 22, 2008
Patent Application Number
10485046
Patent Citations Received
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US Patent 12136562 3D semiconductor device and structure with single-crystal layers
0
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US Patent 12094892 3D micro display device and structure
0
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US Patent 12120880 3D semiconductor device and structure with logic and memory
0
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US Patent 12125737 3D semiconductor device and structure with metal layers and memory cells
0
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US Patent 11694922 Multilevel semiconductor device and structure with oxide bonding
0
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US Patent 11694944 3D semiconductor device and structure with metal layers and a connective path
0
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US Patent 11711928 3D memory devices and structures with control circuits
0
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US Patent 11763864 3D memory semiconductor devices and structures with bit-line pillars
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US Patent 11784169 3D semiconductor device and structure with metal layers
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US Patent 11784082 3D semiconductor device and structure with bonding
•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7402897
Patent Primary Examiner
‌
Laura M. Schillinger

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