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US Patent 12136562 3D semiconductor device and structure with single-crystal layers

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Contents

Is a
Patent
Patent
0

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
121365620
Patent Inventor Names
Zvi Or-Bach0
Brian Cronquist0
Deepak C. Sekar0
Date of Patent
November 5, 2024
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Patent Application Number
185272690
Date Filed
December 2, 2023
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Patent Citations
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US Patent 7436027 Semiconductor device and fabrication method for the same
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US Patent 7863095 Method of manufacturing layered chip package
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US Patent 7864568 Semiconductor storage device
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US Patent 7867822 Semiconductor memory device
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US Patent 7888764 Three-dimensional integrated circuit structure
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US Patent 7910432 Non-volatile semiconductor storage device and method of manufacturing the same
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US Patent 7915164 Method for forming doped polysilicon via connecting polysilicon layers
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US Patent 7919845 Formation of a hybrid integrated circuit device
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Patent Primary Examiner
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Duy T Nguyen
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CPC Code
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H01L 23/3677
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H01L 24/13
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H01L 24/16
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H01L 24/45
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H01L 24/48
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H01L 25/0655
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H01L 25/0657
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H01L 25/50
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Patent abstract

A 3D semiconductor device, the device including: a first level including a first single crystal layer, the first level including first transistors, where each of the first transistors includes a single crystal channel; first metal layers interconnecting at least the first transistors; a second metal layer overlaying the first metal layers; a first oxide layer disposed over the second metal layer; a second oxide layer disposed over the first oxide layer; and a second level including at least one array of memory cells and second transistors, where each of the memory cells includes at least one of the second transistors, where the second level overlays the first level, where at least one of the second transistors includes at least two independent gates, where the second level is directly bonded to the first level, and where the bonded includes direct oxide-to-oxide bonds.

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