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US Patent 7327289 Data-modifying run length encoder to avoid data expansion

Patent 7327289 was granted and assigned to Intel on February, 2008 by the United States Patent and Trademark Office.

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
Current Assignee
Intel
Intel
Date Filed
September 20, 2006
Date of Patent
February 5, 2008
Patent Application Number
11533647
Patent Citations Received
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US Patent 12124383 Systems and methods for cache optimization
0
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US Patent 12066975 Cache structure and utilization
0
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US Patent 12079155 Graphics processor operation scheduling for deterministic latency
0
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US Patent 12093210 Compression techniques
0
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US Patent 11663746 Systolic arithmetic on sparse data
0
‌
US Patent 11676239 Sparse optimizations for a matrix accelerator architecture
0
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US Patent 11709793 Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format
0
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US Patent 11842423 Dot product operations on sparse matrix elements
0
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US Patent 11861761 Graphics processing unit processing and caching improvements
0
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US Patent 11934342 Assistance for hardware prefetch in cache access
0
•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7327289
Patent Primary Examiner
‌
Lam T. Mai

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