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US Patent 12107169 Contact structure for stacked multi-gate device

Patent 12107169 was granted and assigned to Taiwan Semiconductor Manufacturing Company on October, 2024 by the United States Patent and Trademark Office.

Overview Structured Data Issues Contributors

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Current Assignee

Taiwan Semiconductor Manufacturing Company

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Date Filed

July 10, 2023

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Date of Patent

October 1, 2024

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Patent Applicant

Taiwan Semiconductor Manufacturing Company

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Patent Application Number

18349354

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Patent Citations

US Patent 10157799 Multi-gate device and method of fabrication thereof

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US Patent 10192867 Complementary FETs with wrap around contacts and method of forming same

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US Patent 10199502 Structure of S/D contact and method of making same

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US Patent 10256158 Insulated epitaxial structures in nanosheet complementary field effect transistors

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US Patent 10290546 Threshold voltage adjustment for a gate-all-around semiconductor structure

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US Patent 10475902 Spacers for nanowire-based integrated circuit device and method of fabricating same

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US Patent 11177258 Stacked nanosheet CFET with gate all around structure

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US Patent 11069684 Stacked field effect transistors with reduced coupling effect

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US Patent 9818872 Multi-gate device and method of fabrication thereof

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US Patent 9887269 Multi-gate device and method of fabrication thereof

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Patent Inventor Names

Chien Ning Yao

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Shih-Cheng Chen

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Kuo-Cheng Chiang

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Chih-Hao Wang

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Zhi-Chang Lin

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Jung-Hung Chang

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Patent Jurisdiction

United States Patent and Trademark Office

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Patent Number

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Patent Primary Examiner

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CPC Code

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