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Yong Choe

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Edits on 14 Dec, 2021
"Remove inverse infobox"
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Golden AI
edited on 14 Dec, 2021
Edits made to:
Infobox (-72 properties)
Infobox
Patent primary examiner of
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US Patent 7793056 Method of maintaining a data log related to a Programmable Logic Controller (PLC)
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US Patent 7814266 Partial row expansion by logically combining range representation values in content addressable memory
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US Patent 7818515 System and method for enforcing device grouping rules for storage virtualization
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US Patent 7818523 Securing data in memory device
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US Patent 7827378 Defect management using mutable logical to physical association
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US Patent 7836246 Method and apparatus for overlaying flat and/or tree based data sets onto content addressable memory (CAM) device
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US Patent 7836269 Systems and methods for access violation management of secured memory
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US Patent 7849273 Techniques for time-dependent storage management with a portable application programming interface
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US Patent 7849283 Linear combiner weight memory
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US Patent 7853756 Information processing device, processor, processor control method, information processing device control method and cache memory
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US Patent 7856527 Raid system and data transfer method in raid system
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US Patent 7856532 Cache logic, data processing apparatus including cache logic, and a method of operating cache logic
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US Patent 7856539 Method regarding a data log related to a programmable logic controller (PLC)
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US Patent 7861054 Method and system for controlling information of logical division in a storage controller
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US Patent 7865670 Invalidating translation lookaside buffer entries in a virtual machine (VM) system
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US Patent 7865688 Method and system for controlling information of logical division in a storage controller
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US Patent 7870336 Operating system protection against side-channel attacks on secrecy
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US Patent 7870339 Extract cache attribute facility and instruction therefore
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US Patent 7873794 Mechanism that provides efficient multi-word load atomicity
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US Patent 7873795 Multi-process support in a shared register
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US Patent 7873798 Information processing device and method, recording medium, and program
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US Patent 7877538 Testing data transfer time of disk drives in consumer electronics devices
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US Patent 7877546 System, method, and circuit for retrieving data in data blocks into a cache memory from a mass data storage device based on a triggering event
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US Patent 7877550 Bus controller initiated write-through mechanism with hardware automatically generated clean command
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US Patent 7882312 State engine for data processor
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US Patent 7882328 Cancellation of individual logical volumes in premigration chains
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US Patent 7882329 Cancellation of individual logical volumes in premigration chains
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US Patent 7890706 Delegated write for race avoidance in a processor
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US Patent 7890723 Method for code execution
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US Patent 7890724 System for code execution
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US Patent 7895389 Measuring data transfer time for disk drives
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US Patent 7895395 Managing logical volumes in a storage system with remote copy
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US Patent 7895410 Method and apparatus for facilitating adaptive page sizes
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US Patent 7900000 Computer system preventing storage of duplicate files
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US Patent 7900012 Secure storage apparatus and method for controlling the same
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US Patent 7900015 Systems and methods of quota accounting
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US Patent 7900019 Data access target predictions in a data processing system
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US Patent 7904645 Formatting disk drive data using format field elements
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US Patent 7904667 Systems and methods for monitoring and controlling binary state devices using a memory device
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US Patent 7904671 Method regarding a memory device for a programmable logic controller (PLC)
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US Patent 7904679 Method and apparatus for managing backup data
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US Patent 7908423 Memory apparatus, and method of averagely using blocks of a flash memory
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US Patent 7908438 Associative matrix observing methods, systems and computer program products using bit plane representations of selected segments
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US Patent 7908445 Redundant controller dynamic logical media unit reassignment
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US Patent 7908450 Memory management unit, code verifying apparatus, and code decrypting apparatus
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US Patent 7913031 Recording apparatus and recording control program
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US Patent 7913038 Distributed storage system with accelerated striping
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US Patent 7913049 Securing non-volatile data in an embedded memory device
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US Patent 7913053 System and method for archival of messages in size-limited containers and separate archival of attachments in content addressable storage
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US Patent 7921275 Method for enabling direct prefetching of data during asychronous memory move operation
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US Patent 7925843 Memory controller having a plurality of memory regions for protection against power failure
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US Patent 7930471 Method and system for minimizing impact of refresh operations on volatile memory performance
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US Patent 7930472 Method for accessing a first-in-first-out (FIFO) buffer and a FIFO controller therefor
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US Patent 7930490 Method for utilizing a memory device for a programmable logic controller (PLC)
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US Patent 7934067 Data update history storage apparatus and data update history storage method
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US Patent 7941594 SDRAM sharing using a control surrogate
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US Patent 7941596 Locating media by characteristics in storage apparatus
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US Patent 7953921 Directed auto-refresh synchronization
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US Patent 7953935 Cache memory system, and control method therefor
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US Patent 7953937 Systems, methods, and apparatus for subdividing data for storage in a dispersed data storage grid
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US Patent 7953946 Controlled anticipation in creating a shadow copy
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US Patent 7953951 Systems and methods for time division multiplex multithreading
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US Patent 7958321 Apparatus and method for reducing memory access conflict
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US Patent 7966450 Non-volatile hard disk drive cache system and method
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US Patent 7966468 Apparatus, system, and method for fast read request transfer through clock domains
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US Patent 7971014 Information processing apparatus and data recovering method
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US Patent 7984258 Distributed storage system with global sparing
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US Patent 7987333 Reprogramming of select registers in a linked list
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US Patent 8001338 Multi-level DRAM controller to manage access to DRAM
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US Patent 8001353 Apparatus and method for configuring memory blocks
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US Patent 8006032 Optimal solution to control data channels
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US Patent 8006066 Method and circuit configuration for transmitting data between a processor and a hardware arithmetic-logic unit
Edits on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8006032 Optimal solution to control data channels
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Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8001338 Multi-level DRAM controller to manage access to DRAM
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Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8001353 Apparatus and method for configuring memory blocks
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7987333 Reprogramming of select registers in a linked list
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7984258 Distributed storage system with global sparing
Edits on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7971014 Information processing apparatus and data recovering method
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7966450 Non-volatile hard disk drive cache system and method
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7966468 Apparatus, system, and method for fast read request transfer through clock domains
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7958321 Apparatus and method for reducing memory access conflict
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7953951 Systems and methods for time division multiplex multithreading
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7953946 Controlled anticipation in creating a shadow copy
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7953935 Cache memory system, and control method therefor
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Golden AI
edited on 7 Dec, 2021
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7953921 Directed auto-refresh synchronization
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7941594 SDRAM sharing using a control surrogate
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7941596 Locating media by characteristics in storage apparatus
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7934067 Data update history storage apparatus and data update history storage method
Golden AI profile picture
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7930490 Method for utilizing a memory device for a programmable logic controller (PLC)

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