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US Patent 7953935 Cache memory system, and control method therefor

Patent 7953935 was granted and assigned to Panasonic on May, 2011 by the United States Patent and Trademark Office.

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Patent
Patent
1

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Current Assignee
Panasonic
Panasonic
1
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
1
Patent Number
79539351
Patent Inventor Names
Keisuke Kaneko1
Tetsuya Tanaka1
Ryuta Nakanishi1
Hazuki Okabayashi1
Masaitsu Nakajima1
Date of Patent
May 31, 2011
1
Patent Application Number
118168581
Date Filed
February 8, 2006
1
Patent Primary Examiner
‌
Yong Choe
1
Patent abstract

A cache memory system which readily accepts software control for processing includes: a cache memory provided between a processor and memory; and a TAC (Transfer and Attribute Controller) for controlling the cache memory. The TAC receives a command which indicates a transfer and an attribute operation of cache data and a target for the operation, resulting from the execution of a predetermined instruction by the processor, so as to request the operation indicated by the command against the address to the cache memory.

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