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US Patent 9859386 Self aligned contact scheme
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Patent
Date Filed
January 16, 2017
Date of Patent
January 2, 2018
Patent Application Number
15407112
Patent Citations Received
US Patent 12136600 Grounded metal ring structure for through-silicon via
0
US Patent 12132041 Semiconductor device
0
US Patent 12136570 Graphene layer for low resistance contacts and damascene interconnects
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US Patent 12136566 Semiconductor device and method of manufacture
0
US Patent 11652005 Semiconductor device with cut metal gate and method of manufacture
0
US Patent 11664272 Etch profile control of gate contact opening
0
US Patent 11664279 Multiple threshold voltage implementation through lanthanum incorporation
0
US Patent 11665890 One-time programmable memory device including anti-fuse element and manufacturing method thereof
0
US Patent 11670499 Method of forming conductive feature including cleaning step
0
US Patent 11670595 Semiconductor device structure and methods of forming the same
0
•••
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
9859386
Patent Primary Examiner
George Fourson, III
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