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US Patent 9472568 Semiconductor device and method of fabricating the same

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Is a
Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
9472568
Date of Patent
October 18, 2016
Patent Application Number
14502115
Date Filed
September 30, 2014
Patent Citations Received
‌
US Patent 12136562 3D semiconductor device and structure with single-crystal layers
0
‌
US Patent 12094892 3D micro display device and structure
0
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US Patent 12120880 3D semiconductor device and structure with logic and memory
0
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US Patent 12125737 3D semiconductor device and structure with metal layers and memory cells
0
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US Patent 11711928 3D memory devices and structures with control circuits
0
‌
US Patent 11763864 3D memory semiconductor devices and structures with bit-line pillars
‌
US Patent 11784082 3D semiconductor device and structure with bonding
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US Patent 11784169 3D semiconductor device and structure with metal layers
...
Patent Primary Examiner
‌
Earl Taylor
Patent abstract

A semiconductor device is provided as follows. A peripheral circuit structure is disposed on a first substrate. A cell array structure is disposed on the peripheral circuit structure. A second substrate is interposed between the peripheral circuit structure and the cell array structure. The cell array structure includes a stacked structure, a through hole and a vertical semiconductor pattern. The stacked structure includes gate electrodes stacked on the second substrate. The through hole penetrates the stacked structure and the second substrate to expose the peripheral circuit structure. The vertical semiconductor pattern is disposed on the peripheral circuit structure, filling the through hole.

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