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US Patent 9153336 Decoder parameter estimation using multiple memory reads

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
Date Filed
November 1, 2013
Date of Patent
October 6, 2015
Patent Application Number
14070089
Patent Citations Received
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US Patent 11934666 Memory device with dynamic program-verify voltage calibration
3
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US Patent 11953980 Memory sub-system with dynamic calibration using component-based function(s)
4
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US Patent 12001286 Memory device with dynamic processing level calibration
5
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US Patent 11714580 Dynamic background scan optimization in a memory sub-system
6
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US Patent 11714709 Enhanced block management for a memory subsystem
7
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
9153336
Patent Primary Examiner
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VanThu Nguyen

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