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US Patent 8930647 Multiple class memory systems
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Patent
Date Filed
April 6, 2012
Date of Patent
January 6, 2015
Patent Application Number
13441132
Patent Citations Received
US Patent 12135876 Memory systems having controllers embedded in packages of integrated circuit memory
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US Patent 11934319 Memory system for binding data to a memory namespace
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US Patent 11977787 Remote direct memory access in multi-tier memory systems
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US Patent 12066951 Page table hooks to memory types
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US Patent 11669260 Predictive data orchestration in multi-tier memory systems
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US Patent 11706317 Optimization of data access and communication in memory systems
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US Patent 11790219 Three dimensional circuit implementing machine trained network
US Patent 11835999 Controller which adjusts clock frequency based on received symbol rate
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US Patent 11881454 Stacked IC structure with orthogonal interconnect layers
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US Patent 11922990 Memory devices configured to provide external regulated voltages
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Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
8930647
Patent Primary Examiner
Eric S Cardwell
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