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US Patent 8503250 High speed DRAM architecture with uniform access latency

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Is a
Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
8503250
Date of Patent
August 6, 2013
Patent Application Number
13237202
Date Filed
September 20, 2011
Patent Citations Received
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US Patent 12118056 Methods and apparatus for performing matrix transformations within a memory array
0
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US Patent 12027211 Partial block handling protocol in a non-volatile memory device
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0
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US Patent 12117929 Memory shapes
0
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US Patent 11709673 Bit string operations in memory
0
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US Patent 11714640 Bit string operations in memory
0
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US Patent 11755206 Bank to bank data transfer
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US Patent 11768600 Computing reduction and prefix sum operations in memory
...
Patent Primary Examiner
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Son Mai
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