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US Patent 7483031 Method for synchronizing graphics processing units

Patent 7483031 was granted and assigned to NVIDIA on January, 2009 by the United States Patent and Trademark Office.

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
Current Assignee
NVIDIA
NVIDIA
Date Filed
December 8, 2003
Date of Patent
January 27, 2009
Patent Application Number
10730727
Patent Citations Received
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US Patent 12124383 Systems and methods for cache optimization
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US Patent 12079155 Graphics processor operation scheduling for deterministic latency
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US Patent 12093210 Compression techniques
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US Patent 12124759 Hardware architecture for multi-display video synchronization
0
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US Patent 11842423 Dot product operations on sparse matrix elements
0
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US Patent 11934342 Assistance for hardware prefetch in cache access
0
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US Patent 11954062 Dynamic memory reconfiguration
0
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US Patent 11954063 Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format
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US Patent 11995029 Multi-tile memory management for detecting cross tile access providing multi-tile inference scaling and providing page migration
0
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US Patent 12007935 Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format
0
•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7483031
Patent Primary Examiner
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Kee M. Tung

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