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US Patent 12136656 Semiconductor structure having two-dimensional channel
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Patent
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Date Filed
September 27, 2021
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Date of Patent
November 5, 2024
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Patent Application Number
17486460
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Patent Citations
US Patent 8742511 Double gate planar field effect transistors
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US Patent 8916914 Field effect transistor having double transition metal dichalcogenide channels
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US Patent 9349806 Semiconductor structure with template for transition metal dichalcogenides channel material growth
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US Patent 9461114 Semiconductor devices with structures for suppression of parasitic bipolar effect in stacked nanosheet FETs and methods of fabricating the same
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US Patent 9490323 Nanosheet FETs with stacked nanosheets having smaller horizontal spacing than vertical spacing for large effective width
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US Patent 9508801 Stacked graphene field-effect transistor
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US Patent 9548394 All 2D, high mobility, flexible, transparent thin film transistor
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US Patent 9553199 FET device having a vertical channel in a 2D material layer
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US Patent 9748352 Multi-channel gate-all-around FET
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US Patent 9812449 Multi-VT gate stack for III-V nanosheet devices with reduced parasitic capacitance
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•••
Patent Inventor Names
Julien Frougier
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Christopher J. Waskiewicz
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Kangguo Cheng
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Ruilong Xie
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Andrew Gaul
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Andrew M. Greene
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
12136656
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Patent Primary Examiner
Robert K Carpenter
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