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US Patent 11937422 Semiconductor memory device and structure

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
July 4, 2021
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Date of Patent
March 19, 2024
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Patent Application Number
17367385
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Patent Citations
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US Patent 8183630 Circuit with transistors integrated in three dimensions and having a dynamically adjustable threshold voltage VT
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US Patent 9589982 Structure and method of operation for improved gate capacity for 3D NOR flash memory
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US Patent 9595530 Methods and apparatus for vertical bit line structures in three-dimensional nonvolatile memory
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US Patent 9627287 Thinning in package using separation structure as stop
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US Patent 9673257 Vertical thin film transistors with surround gates
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US Patent 9997530 Three-dimensional semiconductor memory device and method of fabricating the same
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US Patent 10199354 Die sidewall interconnects for 3D chip assemblies
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US Patent 6841813 TFT mask ROM and method for making same
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US Patent 6844243 Methods of forming semiconductor constructions
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US Patent 6864534 Semiconductor wafer
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•••
Patent Inventor Names
Jin-Woo Han
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Zvi Or-Bach
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11937422
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Patent Primary Examiner
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Sarah K Salerno
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CPC Code
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G11C 5/025
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