US Patent 10170638 Nanosheet substrate isolated source/drain epitaxy by dual bottom spacer

Parasitic transistor formation under a semiconductor containing nanosheet device is eliminated by providing a dual bottom spacer structure on physically exposed surfaces of a semiconductor substrate after formation of a nanosheet stack of alternating nanosheets of a sacrificial semiconductor material nanosheet and a semiconductor channel material nanosheet on a portion of the semiconductor substrate. The presence of the dual bottom spacer structure prevents bottom up growth of the semiconductor material that provides the S/D regions.