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US Patent 10050639 Partially asynchronous clock scheme for SAR ADC

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
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Date Filed
November 29, 2017
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Date of Patent
August 14, 2018
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Patent Application Number
15825838
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Patent Citations Received
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US Patent 10615811 Successive approximation register analog-to-digital converter and associated method
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US Patent 10763875 Switched capacitor circuit and analog-to-digital converter device
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US Patent 10707886 Asynchronous successive approximation analog-to-digital converter and related methods and apparatus
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US Patent 10790843 Analog-to-digital converter device
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US Patent 10778242 Analog-to-digital converter device
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US Patent 10277236 Asynchronous successive approximation analog-to-digital converter and related methods and apparatus
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Patent Inventor Names
Michael T. Berens
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George E. Baker
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Khoi B. Mai
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
10050639
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Patent Primary Examiner
Howard Williams
Howard Williams
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