Arm

US Patent 7568072 Cache eviction

US Patent 7571305 Reusing a buffer memory as a microcache for program instructions of a detected program loop

US Patent 7574314 Spurious signal detection

US Patent 7587444 Data value addition

US Patent 7587556 Store buffer capable of maintaining associated cache information

US Patent 7590826 Speculative data value usage

US Patent 7596663 Identifying a cache way of a cache access request using information from the microtag and from the micro TLB

US Patent 7599974 Data processing apparatus and method for comparing floating point operands

US Patent 7599998 Message handling communication between a source processor core and destination processor cores

US Patent 7600077 Cache circuitry, data processing apparatus and method for handling write access requests

US Patent 7600141 Data processing performance control

US Patent 7603496 Buffering data during data transfer through a plurality of channels

US Patent 7603605 Performance control of an integrated circuit

US Patent 7605644 Integrated circuit power-on control and programmable comparator

US Patent 7606057 Metal line layout in a memory cell

US Patent 7606108 Access collision within a multiport memory

US Patent 7607133 Interrupt processing control

US Patent 7613052 Memory device and method of operating such a memory device

US Patent 7613053 Memory device and method of operating such a memory device

US Patent 7613911 Prefetching exception vectors by early lookup exception vectors within a cache memory

US Patent 7616041 Data retention in operational and sleep modes

US Patent 7617409 System for checking clock-signal correspondence

US Patent 7624215 Interrupt controller

US Patent 7624253 Determining register availability for register renaming

US Patent 7627462 Hardware simulation using a test scenario manager

US Patent 7627807 Monitoring a data processor to detect abnormal operation

US Patent 7630388 Software defined FIFO memory for storing a set of data from a stream of source data

US Patent 7640286 Data processing apparatus and method for performing floating point multiplication

US Patent 7640397 Adaptive comparison control in a memory

US Patent 7644399 Forming an executable program from a list of program instructions

US Patent 7647368 Data processing apparatus and method for performing data processing operations on floating point data elements

US Patent 7647480 Handling of conditional instructions in a data processing apparatus

US Patent 7647489 Function calling mechanism with embedded index for a handler program and an embedded immediate value for passing a parameter

US Patent 7650479 Maintaining cache coherency for secure and non-secure data access requests

US Patent 7650483 Execution of instructions within a data processing apparatus having a plurality of processing units

US Patent 7653795 Control of metastability in the pipelined data processing apparatus

US Patent 7657587 Multi-dimensional fast fourier transform

US Patent 7657694 Handling access requests in a data processing apparatus

US Patent 7660186 Memory clock generator having multiple clock modes

US Patent 7661104 Task following between multiple operating systems

US Patent 7661105 Exception types within a secure processing system

US Patent 7664901 Data processing apparatus and method for arbitrating access to a shared resource

US Patent 7668892 Data processing apparatus and method for normalizing a data value

US Patent 7668896 Data processing apparatus and method for performing floating point multiplication

US Patent 7668897 Result partitioning within SIMD data processing systems

US Patent 7673187 Data processing apparatus and method for reducing trace bandwidth

US Patent 7676652 Executing variable length instructions stored within a plurality of discrete memory address regions

US Patent 7688668 Controlling power supply to memory cells

US Patent 7689811 Method and apparatus for constant generation in SIMD processing

US Patent 7696649 Power control circuitry and method

US Patent 7698534 Reordering application code to improve processing performance

US Patent 7698537 Data processing apparatus for processing a stream of instructions in first and second processing blocks with the first processing block supporting register renaming and the second processing block not supporting register renaming

US Patent 7706172 Layout of a SRAM memory cell

US Patent 7707390 Instruction issue control within a multi-threaded in-order superscalar processor

US Patent 7707394 Reducing the size of a data stream produced during instruction tracing

US Patent 7711882 Interrupt jitter suppression

US Patent 7723867 Power gating of circuits

US Patent 7725695 Branch prediction apparatus for repurposing a branch to instruction set as a non-predicted branch

US Patent 7729185 Apparatus and method for detection of address decoder open faults

US Patent 7730545 Test access control for secure integrated circuits

US Patent 7734853 Latency dependent data bus transmission

US Patent 7734897 Allocation of memory access operations to memory access capable pipelines in a superscalar data processing apparatus and method having a plurality of execution threads

US Patent 7734974 Serial scan chain control within an integrated circuit

US Patent 7737720 Virtual power rail modulation within an integrated circuit

US Patent 7743238 Accessing items of architectural state from a register cache in a data processing apparatus when performing branch prediction operations for an indirect branch instruction

US Patent 7743294 Diagnostic mode switching

US Patent 7743366 System and method for compiling a computer program

US Patent 7745275 Integrated circuit and a method of making an integrated circuit to provide a gate contact over a diffusion region

US Patent 7747667 Data processing apparatus and method for determining an initial estimate of a result value of a reciprocal operation

US Patent 7747839 Data processing apparatus and method for handling instructions to be executed by processing circuitry

US Patent 7751642 Methods and devices for image processing, image capturing and image downscaling

US Patent 7752424 Null value checking instruction

US Patent 7752425 Data processing apparatus having trace and prediction logic

US Patent 7757027 Control of master/slave communication within an integrated circuit

US Patent 7761280 Data processing apparatus simulation by generating anticipated timing information for bus data transfers

US Patent 7761665 Handling of cache accesses in a data processing apparatus

US Patent 7761693 Data processing apparatus and method for performing arithmetic operations in SIMD data processing

US Patent 7769936 Data processing apparatus and method for arbitrating between messages routed over a communication channel

US Patent 7769955 Multiple thread instruction fetch from different cache levels

US Patent 7769982 Data processing apparatus and method for accelerating execution of subgraphs

US Patent 7770078 Integrated circuit communication self-testing

US Patent 7774582 Result bypassing to override a data hazard within a superscalar processor

US Patent 7783869 Accessing branch predictions ahead of instruction fetching

US Patent 7788417 Target device programmer

US Patent 7788472 Instruction encoding within a data processing apparatus having multiple instruction sets

US Patent 7793078 Multiple instruction set data processing system with conditional branch instructions of a first instruction set and a second instruction set sharing a same instruction encoding

US Patent 7793082 Latch to block short path violation

US Patent 7793181 Sequential storage circuitry for an integrated circuit

US Patent 7797518 Generating instruction sets for compacting long instructions

US Patent 7797520 Early branch instruction prediction

US Patent 7797681 Stack memory selection upon exception in a data processing system

US Patent 7802040 Arbitration method reordering transactions to ensure quality of service specified by each transaction

US Patent 7802080 Null exception handling

US Patent 7805550 Management of polling loops in a data processing apparatus

US Patent 7805557 Interrupt controller and method for handling interrupts

US Patent 7805595 Data processing apparatus and method for updating prediction data based on an operation's priority level

US Patent 7805645 Data processing apparatus and method for testing stability of memory cells in a memory device

US Patent 7808273 Reducing leakage power in low power mode

US Patent 7809930 Selective suppression of register renaming

US Patent 7809972 Data processing apparatus and method for translating a signal between a first clock domain and a second clock domain

US Patent 7809989 Performing diagnostic operations upon an asymmetric multiprocessor apparatus

US Patent 7814297 Algebraic single instruction multiple data processing

US Patent 7814302 Address calculation instruction within data processing systems

US Patent 7822884 Distributed direct memory access provision within a data processing system

US Patent 7822926 Cache memory

US Patent 7822947 Aliasing data processing registers

US Patent 7822955 Data processing apparatus and method for utilizing endianess independent data values

US Patent 7823019 Debug circuitry

US Patent 7830176 Controlling signal levels on a signal line within an integrated circuit

US Patent 7831806 Determining target addresses for instruction flow changing instructions in a data processing apparatus

US Patent 7831815 Data processing apparatus and method for identifying sequences of instructions

US Patent 7831817 Two-level branch prediction apparatus

US Patent 7836288 Branch prediction mechanism including a branch prediction memory and a branch prediction cache

US Patent 7836320 Power management in a data processing apparatus having a plurality of domains in which devices of the data processing apparatus can operate

US Patent 7839016 Maintaining output I/O signals within an integrated circuit with multiple power domains

US Patent 7840001 Data processing apparatus

US Patent 7843760 Interface circuit and method for coupling between a memory device and processing circuitry

US Patent 7844800 Method for renaming a large number of registers in a data processing system using a background channel

US Patent 7849296 Monitoring control for monitoring at least two domains of multi-domain processors

US Patent 7849310 Switching between secure and non-secure processing modes

US Patent 7855924 Data processing memory circuit having pull-down circuit with on/off configuration

US Patent 7856346 Emulating multiple bus used within a data processing system

US Patent 7856532 Cache logic, data processing apparatus including cache logic, and a method of operating cache logic

US Patent 7859937 Apparatus and method for controlling write access to a group of storage elements

US Patent 7861095 Data processing apparatus security

US Patent 7863733 Integrated circuit with multiple layers of circuits

US Patent 7863778 Power controlling integrated circuit cell

US Patent 7865675 Controlling cleaning of data values within a hardware accelerator

US Patent 7866560 Recovering communication transaction control between independent domains of an integrated circuit

US Patent 7870437 Trace data timestamping

US Patent 7873757 Controlling complex non-linear data transfers

US Patent 7873896 High performance pulsed storage circuit

US Patent 7876634 Apparatus and method for adjusting a supply voltage based on a read result

US Patent 7877587 Branch prediction within a multithreaded processor

US Patent 7882293 Interrupt masking control

US Patent 7886098 Memory access security management

US Patent 7893722 Clock control of state storage circuitry

US Patent 7895417 Select-and-insert instruction within data processing systems

US Patent 7895469 Integrated circuit using speculative execution

US Patent 7898278 Power control circuitry, circuitry for analysing a switched power rail, and method of controlling connection of a power source to a switched power rail

US Patent 7900019 Data access target predictions in a data processing system

US Patent 7913120 Selective disabling of diagnostic functions within a data processing system

US Patent 7913131 Scan chain cell with delay testing capability

US Patent 7917701 Cache circuitry, data processing apparatus and method for prefetching data by selecting one of a first prefetch linefill operation and a second prefetch linefill operation

US Patent 7917735 Data processing apparatus and method for pre-decoding instructions

US Patent 7920411 Converting SRAM cells to ROM cells

US Patent 7920584 Data processing system

US Patent 7924056 Low voltage differential signalling driver

US Patent 7924638 Redundancy architecture for an integrated circuit memory

US Patent 7924858 Use of a data engine within a data processing apparatus

US Patent 7925836 Selective coherency control

US Patent 7925840 Data processing apparatus and method for managing snoop operations

US Patent 7925866 Data processing apparatus and method for handling instructions to be executed by processing circuitry

US Patent 7925867 Pre-decode checking for pre-decoded instructions that cross cache line boundaries

US Patent 7925868 Suppressing register renaming for conditional instructions predicted as not executed

US Patent 7925871 Identification and correction of cyclically recurring errors in one or more branch predictors

US Patent 7926021 Insertion of error detection circuits based on error propagation within integrated circuits

US Patent 7930526 Compare and branch mechanism

US Patent 7934029 Data transfer between devices within an integrated circuit

US Patent 7936290 Dynamic selection of suitable codes for variable length coding and decoding

US Patent 7936578 Read only memory cell for storing a multiple bit value

US Patent 7937535 Managing cache coherency in a data processing apparatus

US Patent 7937626 Techniques for generating a trace stream for a data processing apparatus

US Patent 7940546 ROM array

US Patent 7941584 Data processing apparatus and method for performing hazard detection

US Patent 7941608 Cache eviction

US Patent 7945607 Data processing apparatus and method for converting a number between fixed-point and floating-point representations

US Patent 7945806 Data processing apparatus and method for controlling a transfer of payload data over a communication channel

US Patent 7948816 Accessing data within a memory formed of memory banks

US Patent 7949835 Data processing apparatus and method for controlling access to memory

US Patent 7949848 Data processing apparatus, method and computer program product for reducing memory usage of an object oriented program

US Patent 7949866 Exception types within a secure processing system

US Patent 7949914 Diagnostic mode switching

US Patent 7958335 Multiple instruction set decoding

US Patent 7960759 Integrated circuit layout pattern for cross-coupled circuits

US Patent 7961490 Generating ROM bit cell arrays

US Patent 7962664 Techniques for generating a trace stream for a data processing apparatus

US Patent 7966466 Memory domain based security control with data processing systems

US Patent 7977822 Dynamically changing control of sequenced power gating

US Patent 7979642 Managing the storage of high-priority storage items in storage units in multi-core and multi-threaded systems using history storage and control circuitry

US Patent 7979822 Apparatus and method for performing a sequence of verification tests to verify a design of a data processing system

US Patent 7984269 Data processing apparatus and method for reducing issue circuitry responsibility by using a predetermined pipeline stage to schedule a next operation in a sequence of operations defined by a complex instruction

US Patent 7986504 Distributing power to an integrated circuit

US Patent 7987407 Handling of hard errors in a cache of a data processing apparatus

US Patent 7991960 Adaptive comparison control in a data store

US Patent 8000156 Memory device with propagation circuitry in each sub-array and method thereof

US Patent 8001331 Efficiency of cache memory operations

US Patent 8001428 Packing trace protocols within trace streams

US Patent 8004913 Redundancy architecture for an integrated circuit memory

US Patent 8006008 Apparatus and method for data processing having an on-chip or off-chip interconnect between two or more devices

US Patent 8006144 Memory testing

US Patent 8006147 Error detection in precharged logic

US Patent 8010726 Data processing apparatus and method for handling interrupts

US Patent 8010772 Protected function calling

US Patent 8010774 Breakpointing on register access events or I/O port access events

US Patent 8010849 Diagnosing faults within programs being executed by virtual machines