Patent attributes
An asymmetric multiprocessor apparatus 2 is provided in which respective slave diagnostic units 20, 22, 24 are associated with corresponding execution mechanisms 6, 8, 10. A master diagnostic unit 26 tracks the migration of thread execution between the different execution mechanisms 6, 8, 10 so that the execution of a given thread can be followed by the diagnostic mechanisms 20, 22, 24, 26 and this information provided to the programmer. The execution mechanisms 6, 8, 10 can be diverse such as a general purpose processor 6, a DMA unit 12, a coprocessor, an VLIW processor, a digital signal processor 8 and a hardware accelerator 10. The asymmetric multiprocessor apparatus 2 will also typically include an asymmetric memory hierarchy such as including two or more of a global memory, a shared memory 16, a private memory 18 and a cache memory 14.
