US Patent 9072187 Off-plane conductive line interconnects in microelectronic devices

Off-plane conductive line interconnects may be formed in microelectronic devices. In one example, such as device includes a first set of metal conductive lines in a dielectric substrate at a first horizontal layer of the substrate, a second set of metal conductive lines in the substrate at the first horizontal layer of the substrate and vertically offset from the first set of metal lines, and a dielectric material insulating the metal lines from each other and the first horizontal layer from other horizontal layers. Vias in the dielectric material to connect both the first and second set of metal lines to metal lines at a second horizontal layer of the substrate.