US Patent 9020276 Hardware coprocessor for stripe-based interest point detection

A hardware coprocessor architecture calculates the Difference-of-Gaussian (DoG) pyramid of an input image and extracts from this the interest points to be used in several image detection algorithms. Advantages of the architecture include the possibility to process the image by stripes, namely by blocks having one dimension coincident with the input image width, in the absence of an input frame buffer and the possibility to avoid RAM memory. The coprocessor is suitable to be tightly coupled with raw image sources like sensors.