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US Patent 8930647 Multiple class memory systems

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Patent abstractTimelineTable: Further ResourcesReferences
Is a
Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
8930647
Date of Patent
January 6, 2015
Patent Application Number
13441132
Date Filed
April 6, 2012
Patent Citations Received
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US Patent 12135876 Memory systems having controllers embedded in packages of integrated circuit memory
3
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US Patent 11934319 Memory system for binding data to a memory namespace
4
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US Patent 11977787 Remote direct memory access in multi-tier memory systems
5
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US Patent 12066951 Page table hooks to memory types
6
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US Patent 11669260 Predictive data orchestration in multi-tier memory systems
7
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US Patent 11706317 Optimization of data access and communication in memory systems
8
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US Patent 11790219 Three dimensional circuit implementing machine trained network
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US Patent 11835999 Controller which adjusts clock frequency based on received symbol rate
9
...
Patent Primary Examiner
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Eric S Cardwell
Patent abstract

An apparatus is provided comprising a physical memory sub-system including a first memory of a first memory class and a second memory of a second memory class, the second memory being communicatively coupled to the first memory. The apparatus is configured such that the first memory and the second memory are capable of receiving instructions via the memory bus. A system and method are also provided for circuit cooperation. The system includes a first semiconductor platform including at least one first circuit, and at least one additional semiconductor platform stacked with the first semiconductor platform and including at least one additional circuit. Furthermore, the system is operable such that the at least one first circuit and the at least one additional circuit cooperate to carry out at least one task.

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