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US Patent 8782350 Circuit providing load isolation and noise reduction

Patent 8782350 was granted and assigned to Netlist, Inc on July, 2014 by the United States Patent and Trademark Office.

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Is a

Patent

Patent attributes

Current Assignee

Netlist, Inc

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

87823500

Patent Inventor Names

Jayesh R. Bhakta0

Mario Jesus Martinez0

Chi-She Chen0

Hyun Lee0

Jeffrey C. Solomon0

Date of Patent

July 15, 2014

Patent Application Number

134122430

Date Filed

March 5, 2012

Patent Citations Received

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US Patent 11762788 Memory module with timing-controlled data buffering

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US Patent 11994982 Memory module with distributed data buffers

Patent Primary Examiner

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Gurtej Bansal

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