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US Patent 8059456 Programming a NAND flash memory with reduced program disturb

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Patent
Patent
1

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
1
Patent Number
80594561
Patent Inventor Names
Mark Murin1
Mark Shlick1
Date of Patent
November 15, 2011
1
Patent Application Number
118061111
Date Filed
May 30, 2007
1
Patent Citations Received
‌
US Patent 11948644 Two-part programming of memory cells
2
Patent Primary Examiner
‌
Tuan T Nguyen
1
Patent abstract

When a memory device receives two or more pluralities of bits from a host to store in a nonvolatile memory, the device first stores the bits in a volatile memory. Then, in storing the bits in the nonvolatile memory, the device raises the threshold voltages of some cells of the volatile memory to values above a verify voltage. While those threshold voltages remain substantially at those levels, the device raises the threshold voltages of other cells of the volatile memory to values below the verify voltage. In the end, every cell stores one or more bits from each plurality of bits. Preferably, all the cells share a common wordline. A data storage device operates similarly with respect to storing pluralities of bits generated by an application running on the system.

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