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US Patent 7557746 Time domain interpolation scheme for flash A/D converters

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Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
0
Patent Number
75577460
Patent Inventor Names
Mikko Waltari0
Date of Patent
July 7, 2009
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Patent Application Number
120021530
Date Filed
December 13, 2007
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Patent Citations Received
‌
US Patent 11962318 Calibration scheme for a non-linear ADC
0
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US Patent 11881867 Calibration scheme for filling lookup table in an ADC
0
Patent Primary Examiner
Howard Williams
Howard Williams
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Patent abstract

An analog-to-digital converter circuit comprises a first voltage comparator coupled to a first reference voltage and a signal voltage, the first voltage comparator having first negative and first positive outputs for outputting a comparison of the first reference voltage with the signal voltage; a second voltage comparator coupled to a second reference voltage and the signal voltage, the second reference voltage different than the first reference voltage, the second voltage comparator having second negative and second positive outputs for outputting a comparison of the second reference voltage with the signal voltage; and a first arrival time comparator coupled to the first positive output and the second negative output, the first arrival time comparator having a first arrival time comparator output for outputting a comparison of the first positive output with the second negative output.

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